REV.-A
Table 2-3. CPU Port Assignment (cent’d)
Pin
Port
Signal Line
Number
Assignment
Name
Description
25
I
—
Non-maskable interrupt input.
The interrupt routine is executed
at the trailing edge of this signal. This pin is invalid because it
is tied to ground.
26
1
I
—
Interrupt input. The interrupt routine is executed at the leading
edge of this signal. This pin is invalid because it is tied to
ground.
27
MODE 1
—
External memory space setting port. MODES 1 and O (pin 29)
are both pulled up to HIGH so that an external memory of 64K
bytes (addresses O through
can be used.
28
RESET
I
RESET
Reset terminal. When this signal is LOW, the printer is reset,
and ports A through C and D are set to be high impedance
input ports, and port F is set to be an address output (start
address OH).
29
MODE O
I
—
Refer to pin 27, MODE 1.
3 0
x 2
CPU external clock input. This printer is driven with a 14.74
I
—
31
x l
MHz clock. The operation codes are fetched at approximately
1.3 MHz, and memory read/write operations are performed at
approximately 1.6 MHz.
32
Vss
-
—
Ground terminal.
33
AV
SS
—
Ground terminal for the A/D converter in the CPU.
34
Analog input port of the 8-bit A/D converter in the CPU. Reads
I
the states of DIP
through SW2-3.
36
37
Analog input port of the 8-bit A/D converter in the CPU. Reads
the state of DIP
This signal line is connected to the
AUTO FEED XT signal line of the interface. When DIP
is ON, the automatic paper feed function is valid. When the
DIP switch is OFF, this function is controlled by a signal from
the host computer (not fixed).
38
I
—
Analog input port for the 8-bit A/D converter in the CPU.
Reads the
IN signal from the interface. When the
~ signal is HIGH, DC
control from the host computer is
valid. When it is LOW, DC
control is ignored, and the
printer is always selected as a device. (The signal can be tied
LOW using jumper J 1.)
39
I
+ 2 4
Analog input port for the 8-bit A/D converter in the CPU.
Monitors the +24 V voltage and controls the printhead drive
pulse width.
4 0
-
—
Not used.
41
-
—
Not used.
42
VA
REF
I
—
Reference voltage input for the 8-bit A/D converter in the CPU.
4 3
A V
C C
I
—
Power supply input for the 8-bit A/D converter in the CPU.
4 4
o
Memory read timing strobe signal. Connected to the RD strobe
terminal of the gate array and the output enable terminal of
the ROM and RAM.
2-12