Parameter
Value
Memory type
DDR4
DRAM bus width
64 bit
ECC
Enabled
DRAM chip bus width
16 bits
DRAM chip capacity
4096-8192 Mbits
Bank group address count
1
Rank address count
0
Bank address count
2
Row address count
15-16
Column address count
10
Speed bin
DDR4 2400T
Operating frequency
1200 MHz
CAS latency
17
CAS write latency
12
Additive latency
0
RAS to CAS delay
17
Precharge time
17
tRC
46.16 ns
tRASmin
32 ns
tFAW
30 ns
Table 26: DDR4 SDRAM Parameters
2.16
QSPI Flash
The QSPI flash can be used to boot the PS, and to store the FPGA bitstream, ARM application code and
other user data.
2.16.1
QSPI Flash Type
Table 27 describes the memory availability and configuration on the XU1 SoC module.
As there is one QSPI flash chip equipped on the XU1 SoC module, type “single” must be selected
when programming the flash from Vivado tools.
D-0000-428-001
39 / 66
Version 13, 15.08.2019