7/30/2019
Cora Z7 Reference Manual [Reference.Digilentinc]
https://reference.digilentinc.com/reference/programmable-logic/cora-z7/reference-manual?_ga=2.21685883.1349070004.1564406803-1961480359.… 16/23
Figure 9.1. Cora Z7 Clocking
The Zynq Processing System (PS) supports external power-on reset signals. The power-on reset is the master reset of the entire chip. This
signal resets every register in the device capable of being reset. The Cora Z7 drives this signal from the nRESET signal of the DA9062 DC-
DC converter system in order to hold the system in reset until all power supplies are valid. A push-button, labeled RESET, can be used to
toggle the power-on reset signal.
Note: The power-on reset will not reset attached shields.
The external system reset, labeled SRST, resets the Zynq device without disturbing the debug environment. For example, the previous break
points set by the user remain valid after system reset. Due to security concerns, system reset erases all memory content within the PS,
including the OCM. The PL is also cleared during a system reset. System reset does not cause the boot mode strapping pins to be re-
sampled.
The SRST button also causes the CK_RST signal to toggle and trigger a reset on any attached shields.
The Cora Z7 board includes two tri-color LEDs and 2 push buttons as shown in Figure 11.1. The push buttons are connected to the Zynq
PL via series resistors to prevent damage from inadvertent short circuits (a short circuit could occur if an FPGA pin assigned to a push
button was inadvertently defined as an output). The two push buttons are “momentary” switches that normally generate a low output when
they are at rest, and a high output only when they are pressed.
10 Reset Sources
10.1 Power-on Reset
10.2 Processor Subsystem Reset
11 Basic I/O
