7/30/2019
Cora Z7 Reference Manual [Reference.Digilentinc]
https://reference.digilentinc.com/reference/programmable-logic/cora-z7/reference-manual?_ga=2.21685883.1349070004.1564406803-1961480359.… 14/23
The Cora Z7 implements one of the two available PS USB OTG interfaces on the Zynq device. A Microchip USB3320 USB 2.0 Transceiver
Chip with an 8-bit ULPI interface is used as the PHY. The PHY features a complete HS-USB Physical Front-End supporting speeds of up
to 480Mbs. The PHY is connected to MIO Bank 1/501, which is powered at 1.8V. The USB0 peripheral is used on the PS, connected
through MIO[28-39]. The USB OTG interface is configured to act as an embedded host. USB OTG and USB device modes are not
supported.
The Cora Z7 is technically an “embedded host”, because it does not provide the required 150 µF of capacitance on VBUS required to
qualify as a general purpose host. It is possible to modify the Cora Z7 so that it complies with the general purpose USB host requirements
by loading C35 with a 150 µF capacitor. Only those experienced at soldering small components on PCBs should attempt this rework. Many
USB peripheral devices will work just fine without loading C35. Whether the Cora Z7 is configured as an embedded host or a general
purpose host, it can provide 1A on the 5V VBUS line.
Note that if your design uses the USB Host port (embedded or general purpose), then the Cora Z7 should be powered via a wall adapter
capable of providing more power.
The Cora Z7 uses a Realtek RTL8211E-VL PHY to implement a 10/100/1000 Ethernet port for network connection. The PHY connects
to MIO Bank 501 (1.8V) and interfaces to the Zynq-7000 APSoC via RGMII for data and MDIO for management. The auxiliary interrupt
(INTB) and reset (PHYRSTB) signals connect to MIO pins MIO10 and MIO9, respectively.
(https://reference.digilentinc.com/_media/reference/programmable-logic/cora-z7/cora-ethernet.png)
Figure 8.1. Ethernet PHY signals
After power-up the PHY starts with Auto Negotiation enabled, advertising 10/100/1000 link speeds and full duplex. If there is an Ethernet-
capable partner connected, the PHY automatically establishes a link with it, even with the Zynq not configured.
Two status indicator LEDs are on-board near the RJ-45 connector that indicate traffic (LD9) and valid link state (LD8). Table 8.1 shows the
default behavior.
Function
Designator
State
Description
LINK
LD8
Steady On
Link 10/100/1000
Blinking 0.4s ON, 2s OFF
Link, Energy Efficient Ethernet (EEE) mode
7 USB Host
8 Ethernet PHY
