USB Status Bits
Address: 0x9000
PWREN:
D14
0 – USB Port is enumerated
TXE:
D13
0 – Transmit FIFO can accept a byte
RXF:
D12
0 – Receive Buffer has a byte ready
All other bits are Don’t Care.
Reading the USB Port
•
Read the USB Status Register. If RXF is low (and assuming PWREN is low), you may read
the USB Data.
•
Read the USB Data Register.
This seems pretty straightforward until you learn the “gotcha.” The Parallel Port has a two
word receive buffer that has to fill before the data can be read internally. This means that
there will be three read cycles before you actually get the data. The USB may or may not
have valid data available if it is clocked successive times since the RXE flag only guarantees
one valid byte is available.
So here’s the trick!
We address the Parallel Port to read from Address 0x8FFE. You may recall that only the
upper nibble is decoded by the PLD. The address then auto increments to 0x9000 which
points to the USB Status Register and does not strobe the USB Read Line. You can read the
USB Status Register successively with no side effects. This is a convenient way to check the
status for the next byte in the USB queue.
This trick may be useful for interfacing high speed ADCs as well since many of the same
issues may apply. Of course, if the FIFO status flags are deeper, then this won’t be a
problem.
Writing the USB Port
•
Read the USB Status Register (0x9000). If TXE is low (and assuming PWREN is low), you
may write the USB Data.
•
Write the USB Data Register (Address 0x8000).
There are no extra buffers in the transmit path, so the Receive “trick” is not needed.
dspstak™ 21262sx User Manual
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