CS5460A
DS284PP4
49
we set R
I+
= R
I-
= 470
Ω
, then a value of C
Idiff
= 18
nF and a value of 0.22 nF for C
I-
and C
I-
will yield
a -3dB cutoff frequency of 15341 Hz for the current
channel. Then, for the voltage channel, if we also
set R
V+
= R
V-
= 470
Ω
, C
Vdiff
= 18 nF, and C
V-
= C
V-
= 0.22 nF (same as current channel), the -3dB cut-
off frequency of the voltage channel’s input filter
will be 14870 Hz. The difference in the two cutoff
frequencies is due to the difference in the input im-
pedance between the voltage/current channels.
If we were concerned about the effect that the dif-
ference in these two cutoff frequencies (and there-
fore the mis-match between the time-constants of
the overall voltage/current input networks) would
have on the accuracy of the power/energy registra-
tion, the designer might take the trouble to use a
non-standard resistor value for R
V+
= R
V-
of (for ex-
ample) 455
Ω
. This would shift the (differential)
-3dB cutoff frequency of the voltage channel’s in-
put filter (at the voltage channel inputs) to ~15370
Hz, which would cause the first-order time-con-
stant values of the voltage/current channel input fil-
ters to be more equal.
As was mentioned earlier, in addition to or as an al-
ternative to slightly modifying the value of R
I+
=
R
I-
or R
V+
= R
V-
, the designer can often obtain clos-
er agreement between the voltage/current channel
time-constants by adjusting the phase compensa-
tion bits, which can often allow the designer to
avoid the requirement to use less commonly-avail-
able resistor/capacitor values (such as R
I+
= R
I-
=
455
Ω
). Suppose that we do not slightly alter the
values of R
V+
= R
V-
, so that the values of the R’s
and C’s of both channels is again the same (470
Ω
).
In this case, we can estimate the first-order
time-constants of the two R-C filters by taking the
reciprocal of the -3dB cutoff frequencies (when ex-
pressed in rads/s).
If we subtract these two
time-constants, we can conclude that after the volt-
age/current signals pass through their respective
anti-aliasing filters, the sensed voltage signal will
be delayed ~0.329 µs more than the current signal.
If we assume that we are metering a 60 Hz power
system, this implies that the input voltage-sense
signal will be delayed ~0.007 degrees more than
the delay imposed on the input current-sense sig-
nal. Also, we note that when the PC[6:0] bits are
set to their default setting of “0000000”, the inter-
nal filtering stages of the CS5460A will impose an
additional delay on the (fundamental frequency
component of the) voltage signal of 0.0215 de-
grees, with respect to the current signal. (Again,
note that we are assuming a 60 Hz power system).
The total difference between the delay on the volt-
age-sense fundamental and the current-sense fun-
damental will therefore be ~0.286 degrees. But if
we were to set the phase compensation bits to
1111111, the CS5460A will delay the voltage
channel signal by an additional -0.04 degrees,
which is equivalent to shifting the voltage signal
forward by 0.04 degrees. The total phase shift on
the voltage-sense signal (with respect to the funda-
mental frequency) would then be ~0.011 degrees
ahead of the current-sense signal, which would
therefore provide more closely-matched delay val-
ues between the voltage-sense and current-sense
signals. Adjustment of the PC[6:0] bits therefore
can provide an effective way to more closely match
the delays of the voltage/current sensor signals, al-
lowing the designer to use commonly available R
and C component values in both of these filters.
As a final note, the reader should realize that the
above situation is rather hypothetical. For example,
if we assume that the tolerances of the R and C
components that are used to build the two R-C fil-
ters is ±0.1%, then either time-constant could vary
by as much as much as ~±2.07 µs, which means
that the difference between the delays of the volt-
age-sense and current-sense signals that is caused
by these filters could vary by as much as ~±4.1 µs,
which is equivalent to a phase shift of ~±0.089 de-
grees (at 60Hz). This in turn implies that our deci-
sion to adjust the PC[6:0] bits (to shift the voltage
signal forward by 0.04 degrees) could actually
Summary of Contents for CS5460A
Page 63: ... Notes ...
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