Cirrus Logic CS5460A, Manual

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CS5460A
DS284PP4 29
cannot be expressed with only one pulse, then a
burst of pulses will be issued, possibly followed by
a period of time during which there will be no puls-
es, until the next A/D sampling period occurs. Af-
ter the pulse or pulses are issued, a certain residual
amount of energy may be left over in this internal
energy accumulation register, which is always less
(in magnitude) than the amount of energy repre-
sented by one pulse. In this situation, the residual
energy is not lost or discarded, but rather it is main-
tained and added to the energy that is accumulated
during the next A/D conversion cycle. The amount
of residual energy that can be left over becomes
larger as the Pulse-Rate Register is set to lower and
lower values, because lower Pulse-Rate Register
values correspond to a higher amount of energy per
pulse (for a given calibration).
4.2.2 Mechanical Counter Format
Setting the MECH bit in the Control Register to ‘1’
and the STEP bit to ‘0’ enables wide-stepping puls-
es for mechanical counters and similar discrete
counter instruments. In this format, active-low
pulses are 128 ms wide when using a 4.096 MHz
crystal and K=1. When energy is positive, the puls-
es appear on EOUT. When energy is negative,
pulses appear on EDIR. It is up to the user to insure
that pulses will not occur at a rate faster than the
128 ms pulse duration, or faster than the mechani-
cal counter can accommodate. This is done by ver-
ifying that the Pulse-Rate Register is set to an
appropriate value. Because the duration of each
pulse is set to 128 ms, the maximum output pulse
frequency is limited to ~7.8 Hz (for MCLK/K =
4.096 MHz). For values of MCLK / K different
than 4.096 MHz, the duration of one pulse is (128
* 4.096 MHz)/(MCLK / K) milliseconds. See
Figure 11 for a diagram of the typical pulse output.
4.2.3 Stepper Motor Format
Setting the STEP bit in the Control Register to ‘1’
and the MECH bit to ‘0’ transforms the EOUT and
EDIR pins into two stepper motor phase outputs.
When enough energy has been registered by the
CS5460A to register one positive/negative energy
pulse, one of the output pins (either EOUT or
EDIR) changes state. When the CS5460A must is-
sue another energy pulse, the other output changes
state. The direction the motor will rotate is deter-
mined by the order of the state changes. When en-
ergy is positive, EOUT will lead EDIR such that
the EOUT pulse train will lead the EDIR pulse train
by ~1/4 of the periods of these two pulse train sig-
nal. When energy is negative, EDIR will lead
EOUT in a similar manner. See Figure 12.
128 ms
128 ms
EOUT
EDIR
Positive Energy
Negative Energy
...
... ...
...
Figure 11. Mechanical Counter Format on EOUT and EDIR
EOUT
EDIR
Positive Energy Negative Energy
...
...
...
...
Figure 12. Stepper Motor Format on EOUT and EDIR