CAEN
Electronic Instrumentation
UM3148
–
DT5730/DT5725 User Manual rev. 2
32
Trigger Management
According to the default firmware operating, all the channels in a board share the same trigger (board common
trigger), so they acquire an event simultaneously and in the same way (a determined number of samples according to
buffer organization and custom size settings, and position with respect to the trigger given by the post-trigger).
Note:
For the trigger management in the DPP firmware operating, please refer to
[RD9]
and
[RD10]
.
The generation of a common acquisition trigger is based on different trigger sources (configurable at register address
0x810C):
•
Software trigger
•
External trigger
•
Self-trigger
•
Coincidence
TRG IN
Enable Mask
x4
COMMON TRIGGER
SW TRG
GPO
(TRG OUT)
TRG_REQ [3:0]
D
Q
SCLK
Acquisition
Logic
Memory
Buffers
Local Bus
Interface
Mother Board
x4
4
4
ADC
ADC
CH0
CH1
TRG_REQ [0]
SELF-TRIG. SET.
OVTHR PULSE
SELF-TRIG. SET.
PULSE
OVTHR
AND
ONLY 0
ONLY 1
OR
Mezzanine
4
4
Fig. 9.9:
Block Diagram of the trigger management
Software Trigger
Software triggers are internally produced via a software command (write access at register address 0x8108) through
USB or Optical Link.
External Trigger
A TTL or NIM external signal can be provided in the front panel TRG-IN connector (configurable at
register address
0x811C). If the external trigger is not synchronized with the internal clock, a 1-clock period jitter occurs.