Brother HL-P2000, Service Manual

Page: 22 / 294

II-3
1.3 Main PCB
1.3.1 CPU Core
Fig. 2-3 shows the CPU circuit block on the main PCB.
The CPU is a Motorola MC68EC000FN16 which is driven at a clock frequency of 15.3
MHz. This clock frequency is made by dividing the source clock of 30.67 MHz by two.
Fig. 2-3
1.3.2 ASIC
The ASIC is composed of a Cell Based IC that contains the following functional blocks.
(1) Oscillator circuit
Generates the main clock for the CPU by dividing the source clock frequency by
two.
(2) Address decoder
Generates the CS for each device.
(3) DRAM control
Generates the RAS, CAS, WE, OE and MA signals for the DRAM and controls
refresh processing (CAS before RAS self-refreshing method).
(4) Interrupt control
Interrupt levels:
Priority High 7 NMI
6 FIFO
5 SCANINT
4 BD / Timer 1
3 SCANINT
2 CDCC / BOISE / DATA EXTENSION
Low 1 Timer 2