|
- Revised,
||
- New
©2003 BALLY GAMING AND SYSTEMS
14-14
ProSlot-
6000
™
P1_C[1..40]
P2_C[1..40]
HHU (ON BOARD)
DUART 1
!IO_CS2
!IO_CS1
!EXP_CS
5
10
9
8
7
6
1
4
3
2
J3
MC68681
FE1000
!DUARTCS1
R_W
!UART1
!IACKD1
!RESET
!DTACKB
!DTACKB
!UART1
!DTACKB
9
!DUARTCS1
D7
D6
D5
D4
D3
D2
D1
D0
A1
A4
A3
A2
R_W
25
16
24
17
23
18
22
19
D3
D4
D5
D6
D7
D0
D1
D2
35
1
RS2
RS3
RS4
RS1
3
5
6
DTACK
R/W
CS
8
!IACKD1
!UART1
!RESET
RP28H
9
1
10K
34
21
37
RESET
IRQ
IACK
U38
11
11
ADJUST PINOUT AS NEEDED
FOR EXPANSION MODULE
DUAL ROW HEADERS
NOTE: SPACE PARALLEL
3.2" - 3.6" APART
!EXP_IRQ
+5
R_W
!EXP_CS
!RESET
!IO_CS2
!IO_CS1
24
21
23
22
20
A4
19
18
17
16
15
14
13
12
24
21
23
22
20
19
18
17
16
15
14
13
12
+12
E
VMA
P1_C34
+24
-12
+5
P1_A34
P1_A35
P1_B35
P1_B36
LINK PROGRESSIVE
+5
8
9
DIP SHUNT
DSR2
DTR2
RTS2
CTS2
6
11
7
10
5
4
12
13
-12
TXD2
RXD2
+5
3
2
14
15
U70
1
16
X2
X1/CLK
32
33
+12
D1
A3
A2
A1
D4
D3
D5
D2
D6
7
10
9
8
6
5
4
3
D7
D0
2
1
J1
JW9
11
10
74HC04
U61E
30
RXDB
TXDB
OP7
OP5
OP3
OP1
IP5
IP2
IP1
15
14
13
12
11
38
36
4
S7
OP6
OP4
OP2
OP0
TXDA
26
10
27
28
29
IP4
IP3
IP0
RXDA
39
2
7
31
S6
JW8
7
7
10
9
8
6
5
4
3
SN75ALS194
J2
2
1
P1_A38
P1_C35
P1_C36
P1_A36
P1_A37
P1_C38
P1_B37
P1_B38
P1_C37
P1_A39
P1_B39
2A
EN
1A
7
4
5
2Y-
6
2Y+
3
1Y-
U24A
SN75ALS195
1
2
1Y+
2A-
P1_A13
P1_B13
P1_A[1..40]
P1_B[1..40]
P1_A14
P1_C14
10
P1_A19
7
DTR1
2Y
EN
1Y
5
4
3
6
2A+
1
1A-
2
1A+
U25A
9
MC145406
8
RXD1(-)
RXD1(+)
+5
-12
12
11
13
14
6
5
4
3
+5
15
16
2
1
U27
CTS1
RTS1
DSR1
TXD1
P1_C18
P1_B19
P1_A18
P1_B18
RXD1
+12
P1_C17
DUART 2
SRAM_CLR
3
1
DUART 3
U39
!DUARTCS2
!IACKD2
!DTACKA
!UART2
8
D1
16
D[
0.
.15]
A[
0
..23]
+5
D7
D6
D5
D4
D3
D2
FE1020
MC68681
24
17
23
18
22
19
D5
D6
D7
D1
D2
D3
D4
!DUARTCS2
!DTACKA
!IACKD2
!UART2
!RESET
A3
D0
A4
A2
A1
R_W
CS
25
5
RS3
RS4
6
D0
RS2
R/W
3
8
1
RS1
34
21
37
35
RESET
IRQ
IACK
DTACK
9
A[0..23]
RP28G
10K
1
+5
D[0..15]
S[1..8]
3.69_MHZ
SRAM_CLR
9
8
10
11
12
13
14
15
16
DS1
7
6
5
4
3
2
1
+5
FE1060
MC68681
!DUARTCS3
!IACKD3
!DTACKC
!UART3
CS
D1
D5
D7
D6
D4
D3
D2
A4
D0
A3
A2
A1
R_W
16
24
17
23
18
22
19
D5
D6
D7
D1
D2
D3
D4
25
RS2
RS4
RS3
6
D0
5
R/W
8
1
RS1
3
!DUARTCS3
!DTACKC
!IACKD3
!UART3
!RESET
10k
R20
+5
U37
34
21
37
35
RESET
IRQ
IACK
DTACK
9
X1/CLK
DIP SHUNT
ACCOUNTING (SDS)
BILL ACCEPTOR
MC145406
U49
VCC
+5
13
36
X1/CLK
X2
33
OP3
OP7
OP5
OP1
TXDB
IP5
IP2
32
15
14
13
12
11
38
S5
OP0
IP1
RXDB
OP6
OP4
OP2
4
10
26
27
28
IP0
TXDA
IP4
IP3
RXDA
29
30
39
2
S4
7
31
+5
16
9
10
11
12
13
14
15
U40
9
10
11
12
RS232 TX
6
5
4
9
8
7
S7
S6
S5
S4
S3
S2
S1
1
1
1
1
1
1
10K
RP20
3.69_MHZ
X2
33
JW5
RP27
10K
RS232 RX
3
+5
JW14
1
ISOL_RX
6
5
+5
15
14
16
1
1
VCC
ISOL_TX
SN75ALS194
JW13
9
8
15
12
10K
R14
2A
2Y-
EN
2Y+
13
14
4
P1_C23
P1_C22
P1_B22
P1_A20
P1_A21
P1_C21
P1_B21
MPQ2222
Q35B
1
+12
8
7
6
-12
DTR4
DSR4
5
4
3
2
RTS4
CTS4
RXD4
TXD4
2.2K
R81
EXT. RESET
SEND
OUT_OF_SVC
ACCEPT_EN
8
7
6
5
-12
4.7K
VCC
22K
R17
5
6
7
VCC
R13
P1_C24
P1_A23
P1_B24
P2_C26
P2_C36
13
MPQ2222
Q35A
2
13
4.7K
R16
INTERRUPT
XMIT_DATA
RCV_DATA
2
3
1
+12
4.7K
R79
6
MPQ2222
Q34C
P1_A22
P1_B23
10
5
9
Q34B
MPQ2222
7
8
1A+
2A-
2A+
1A-
NOT USED
R80
11
SN75ALS195
2Y
12
13
1Y
EN
U25B
10
9
VCC
15
+5
14
VCC
RXD6(-)
RXD6(+)
P1_A34
MPQ2222
12
Q34D
14
R11
10K
P1_C34
R12
MPQ2222
3
1
2
4.7K
Q34A
P1_A15
P1_B15
BATT_LOOPBACK
OP0
36
!EXP_IRQ
OP7
OP5
OP3
OP1
TXDB
IP5
IP2
13
32
15
14
12
11
38
S3
IP1
RXDB
OP6
OP4
OP2
4
10
26
27
28
1
TXDA
IP4
IP3
IP0
RXDA
7
29
30
39
2
31
+5
!IRQ_I2C
MPU DETECT FEAT.
JW11
U24B
74HC04
U61D
2
9
1
2
JW7
JW6
1A
1Y-
1Y+
11
10
+5
-12
MC145406
10
9
11
12
7
8
6
5
TXD6(+)
TXD6(-)
TXD6/DTR5
RXD6/DSR5
RTS5
NEW_PIN
!IRQ_I2C
!ALARM
R_W
15
13
14
U26
16
2
4
3
1
+12
RXD5
CTS5
TXD5
!ALARM
P1_C13
P1_B14
P1_A17
P1_C16
P1_B17
P1_C15
P1_A16
P1_B16
P1_B20
A[0..23]
D[0..15]
D0
33
SPARE
10
BH_DATA
P1_B33
VB_DOOR
NOT USED
MPQ2222
Q35C
10
9
8
MPQ2222
Q35D
12
13
14
32.768 KHZ
Y2
NOT STUFFED
C4
PUSH SWITCH
PSEUDO_COIN
PUSH SWITCH
COIN MECH DISABLE
TOGGLE SWITCH
SW3
SW2
VBB
SW1
FE1040
6522P2
D4
D7
D6
D5
D3
D2
D1
29
D6
D7
D5
D4
26
27
28
D3
D2
D1
D0
30
31
32
CB1
TEST
CB2
19
14
PB6
PB7
PB5
PB4
18
17
16
15
PB3
PB2
PB1
PB0
13
12
11
RTC DATA
RTC RESET
RTC CLK
DROP OPTIC
PSUEDO_COIN
BH_FAULT
BH_COMM
3
8
2
CALENDAR
DS1202
X2
I/O
U53
VBB
X1
SCLK
RST
6
7
5
U74E
11
CLR DOOR
74HC14
U51A
1
2
74HC05
10
13
74HC05
U74F
12
DETECT
U54A
6
5
Q
CLR
CLK
VBB
Q
14
D
PR
JW17
VBB
MBR170
CR1
JW15
DOOR HINGE SW
DROP OPTIC
BH_FAULT
PROGRAMMABLE I/O PORTS
SERIAL COMMUNICATION
MPU_DETECT
P1_A[1..40]
P1_C[1..40]
P1_B[1..40]
P2_A[1..40]
P2_B[1..40]
P2_C[1..40]
R45
R46
.1uF
C8
3
1
2
4
1M
1M
P1_B34
P1_A33
P1_C33
74HC05
U74A
2
1
D
DETECT
Q
8
CLR
CLK
U54B
Q
9
PR
JW21
1M
.1uF
C20
R78
13
11
R77
12
10
1M
SLANT_LOWER_DOOR
KNOCK_OFF_SWITCH
FORWARD/!REVERSE
!REVERSE_ENABLE
!FORWARD_ENABLE
NOT STUFFED
R29
KNOCK_DOWN_SWITCH
SLANT_LOWER_DOOR
DOOR_HINGE_SW
9
1
4
1
D4
29
14
!VIACS1
!RESET
D7
D6
D5
!VIACS1
!VIA1
RS0
E
VMA
A4
A3
A2
R_W
25
R/W
CS2
CS1
RES
23
24
34
E
RS1
RS3
RS2
22
35
36
37
A1
!VIA1
IRQ
U42
38
21
VIA 1
CA2
PA3
6
PA7
PA6
PA5
PA4
9
8
7
PA0
PA2
PA1
5
4
3
2
COIN OFF
DOOR LATCH
CLR DOOR
MPU_DETECT
TEST SW
RP30
CA1
39
40
10K
FE10C0
6522P2
26
27
28
D7
D6
D5
D4
+5
CB1
CB2
19
PB7
PB6
PB5
PB4
18
17
16
15
D2
D3
D1
D0
VMA
A4
A3
A2
A1
!VIA2
!VIACS2
E
VMA
!VIA2
E
R/W
!VIACS2
!RESET
33
31
30
32
D3
D2
D1
D0
23
24
34
25
CS2
CS1
RES
E
R_W
RS0
22
35
36
37
RS3
RS2
RS1
38
21
IRQ
U41
PA3
10
PB3
PB2
PB1
PB0
12
13
11
PA7
PA6
PA5
PA4
9
8
7
6
CA2
PA2
PA1
PA0
5
4
3
2
CA1
39
40
3
2
VIA 2
1
1
8
RP24D
7
8
2
5
4
3
1
1
1
1
1
9
8
7
6
10
1
1
1
1
1
3
4
2
6
5
1
1
1
1
1
750K
R28
RP26
10K
RP30
10K
RP24C
RP24B
RP24A
PSUEDO_COIN
BH_CLK
COIN OFF
MPU_DETECT
TEST SW
6
4
2
5
3
1
DISPLAY D6
SPI DATA
SPI CLK
DISPLAY D7
DISPLAY D5
DISPLAY D4
DISPLAY D3
DISPLAY D2
4
7
6
5
9
10
8
3
2
RP22D
RP23D
RP23B
RP23A
RP23C
RP22C
RP22B
RP22A
7
6
5
10
9
8
RP21A
RP21D
RP21C
RP21B
1
10K
RP25
1
1
1
1
1
1
+5
1
1
FE10A0
PCD8584
10K
RP29
1
1
1
1
1
1
+5
8
7
4
2
6
3
1
5
8
6
4
2
7
5
3
1
2
8
6
4
1
7
5
3
220
DISPLAY D1
DISPLAY D0
SPARE
!RST
!WR
!RD
AO
I2C BUS CONTROLLER
RESET
7.37_MHZ
!I2C
RESET
A1
!I2C
R_W
7.37_MHZ
!IRQ_I2C
74HC05
16
6
17
18
1
19
5
4
10k
R49
1
U56A
2
10k
R31
10k
R37
+5
7
CS
R/W
A0
DTACK
CLK
12
DB7
DB6
DB5
DB4
15
14
13
DB3
DB2
DB1
DB0
11
9
8
RST/STB
INT
IACK
U55
SCL
SDA
3
2
D0
D4
D7
D6
D5
D3
D2
D1
1N4148
1N4148
D1
1N4148
D2
D3
1N4148
100
D4
100
R47
R48
NOT STUFFED
+5
R30
+5
P1_A31
P1_A32
P1_C32
P1_B32
P1_A30
P1_C31
P1_B30
P1_C30
P1_C28
P1_B29
P1_C29
P1_A28
P1_A29
P1_B28
P1_B31
P1_C25
P1_A27
P1_B27
P1_C27
P1_A24
P1_A26
P1_C26
P1_B25
P1_B26
P1_A25
P2_B37
P2_A37
Card Rack / MPU Board
MPU Board (4 of 5) AS-03356-0438
;
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Upright
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Slant
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ESlant
Summary of Contents for ProSlot 6000
Page 50: ...2003 Bally Gaming and Systems 3A 4 Glass and Decals Revised New...
Page 122: ...2003 Bally Gaming and Systems 3B 4 ProSlot 6000 Revised New...
Page 246: ...2003 Bally Gaming and Systems 3 100 ProSlot 6000 Revised New...
Page 250: ...Periodic Maintenance 4 4 2002 Bally Gaming and Systems...
Page 274: ...GLOSSARY 5 20 2002 Bally Gaming and Systems...
Page 278: ...6B 4 2000 Bally Gaming Inc ProSlot 6000 Plus...
Page 290: ...6B 16 2000 Bally Gaming Inc ProSlot 6000 Plus Tower Selections...
Page 291: ...6B 17 2000 Bally Gaming Inc ProSlot 6000 Plus Tower Selections cont...
Page 294: ...6B 20 2000 Bally Gaming Inc ProSlot 6000 Plus...
Page 304: ...Peripherals 8 4 2002 Bally Gaming and Systems...
Page 348: ...Peripherals 8 48 2002 Bally Gaming and Systems...
Page 396: ...Revised New 2003 BALLY GAMING AND SYSTEMS 9 48 ProSlot 6000...
Page 400: ...12 4 ProSlot 6000 MARCH 2000...
Page 404: ...12 8 ProSlot 6000 MARCH 2000...