INTRODUCTION
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APPENDIX A - IMMFP12 QUICK REFERENCE MATERIAL
INTRODUCTION
This appendix provides quick reference information to aid in
the hardware configuration of the IMMFP12 Multi-Function
Processor Module. Table
show the settings for
dipswitches SW3 and SW4. Table
shows the jumper set-
tings for jumper J5. Table
is an abbreviated error code list-
ings. Table
Table A-1. IMMFP12 Dipswitch SW3 Settings
Pole
Setting
Function
1
0
Normal run.
1
Enable diagnostics using dipswitch UMB1.
2
0
Unused. Do not change setting.
3
0
Controlway (1 Mbaud).
1
Module bus (83.3 kbaud) used.
4 - 8
1
2 - 31
Controlway or module bus address.
NOTE: 0 = CLOSED or ON, 1 = OPEN or OFF.
1. Address zero and one reserved whenever communication modules are used.
Table A-2. IMMFP12 Dipswitch SW4 Settings
Pole
Setting
Function
1
0
Disable special operations.
1
Enable special operations. Refer to
in Section 3 for explanation.
2
0
Disable on-line configuration.
1
Enable on-line configuration.
3
0
Perform NVRAM checksum routine.
1
Inhibit NVRAM checksum routine.
1
4
0
Perform ROM checksum routine.
1
Inhibit ROM checksum routine.
1
5
0
Reserved for future options. Use this setting for nor-
mal operations even though it performs no function
at this time.
1
Reserved for future options. Do not use this setting.
6
0
Normal operation.
1
The compact configuration function.
2
7
0
Normal operation.
1
Initializes NVRAM (erase configuration) memory.
NOTE:This pole must remain CLOSED for normal
operation.