ATtiny15L
22
•
Bits 1, 0 - ISC01, ISC00: Interrupt Sense Control 0 bit 1 and bit 0
The External Interrupt 0 is activated by the external pin INT0 if the SREG I-flag and the corresponding interrupt mask is set
(one). The activity on the external INT0 pin that activates the interrupt is defined in the following table:
Note:
When changing the ISC10/ISC00 bits, INT0 must be disabled by clearing its Interrupt Enable bit in the GIMSK Register. Other-
wise an interrupt can occur when the bits are changed.
Sleep Modes
To enter any of the three sleep modes, the SE bit in MCUCR must be set (one) and a SLEEP instruction must be executed.
The SM1 and SM0 bits in the MCUCR register select which sleep mode (Idle, ADC Noise Reduction, or Power-down) will
be activated by the SLEEP instruction, see Table 7. If an enabled interrupt occurs while the MCU is in a sleep mode, the
MCU wakes up. The MCU is then halted for four cycles, executes the interrupt routine, and resumes execution from the
instruction following SLEEP. On wake-up from Power-down mode on pin change, the two instructions following SLEEP.
The contents of the register file, SRAM, and I/O memory are unaltered when the device wakes up from sleep. If a reset
occurs during sleep mode, the MCU wakes up and executes from the Reset vector.
Idle Mode
When the SM1/SM0 bits are “00”, the SLEEP instruction forces the MCU into the Idle mode, stopping the CPU but allowing
the ADC, Analog Comparator, Timer/Counters, Watchdog and the interrupt system to continue operating. This enables the
MCU to wake-up from external triggered interrupts as well as internal ones like the Timer Overflow interrupt and watchdog
reset. If the ADC is enabled, a conversion starts automatically when this mode is entered. If wake-up from the Analog Com-
parator interrupt is not required, the Analog Comparator can be powered down by setting the ADC-bit in the Analog
Comparator Control and Status Register – ACSR. This will reduce power consumption in Idle mode.
ADC Noise Reduction Mode
When the SM1/SM0 bits are “01”, the SLEEP instruction forces the MCU into the ADC Noise Reduction mode, stopping the
CPU but allowing the ADC, the external interrupt pin, pin change interrupt, and the Watchdog (if enabled) to continue oper-
ating. Please, note that the clock system including the PLL is also active in the ADC Noise Reduction mode. This improves
the noise environment for the ADC, enabling higher resolution measurements. If the ADC is enabled, a conversion starts
automatically when this mode is entered. In addition to Watchdog Time-out and external reset, only an external level-trig-
gered interrupt, a pin change interrupt or an ADC interrupt can wake-up the MCU.
Power-down Mode
When the SM1/SM0 bits are “10”, the SLEEP instruction forces the MCU into the Power-down mode. Only an external
reset, a watchdog reset (if enabled), an external level-triggered interrupt, or a pin change interrupt can wake-up the MCU.
Note that if a level-triggered or pin change interrupt is used for wake-up from Power-down mode, the changed level must
be held for some time to wake-up the MCU. This makes the MCU less sensitive to noise. The changed level is sampled
twice by the watchdog oscillator clock, and if the input has the required level during this time, the MCU will wake-up. The
period of the watchdog oscillator is 2.9
µs
(nominal) at 3.0V and 25
°
C. The frequency of the watchdog oscillator is voltage
dependent as shown in the Electrical Characteristics section.
When waking up from the Power-down mode, there is a delay from the wake-up condition occurs until the wake-up
becomes effective. This allows the clock to restart and become stable after having been stopped. The wake-up period is
defined by the same CKSEL fuses that define the reset time-out period.
Table 8.
Interrupt 0 Sense Control
ISC01
ISC00
Description
0
0
The low-level of INT0 generates an interrupt request.
0
1
Any change on INT0 generates an interrupt request
1
0
The falling edge of INT0 generates an interrupt request.
1
1
The rising edge of INT0 generates an interrupt request.