ASEM CPU 1021/A User Manual Download Page 54

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CPU 1021/A

User’s Guide

Asem S.p.A.

SATA Port 2

Multi-Sector Transfers

•

Sets the number of sectors that the disk can access at the same
time

LBA Mode Control

•

LBA (Logical Block Addressing) must be activated for disks with a
capacity of more than 528MB.

32 Bit I/O

•

This setting enables or disables 32 bit IDE data transfer .

Transfer Mode

•

Determines method of data transfer from or to drive.

Ultra DMA Mode

•

Determines the Ultra DMA data transfer mode.

SMART Monitoring

•

This function monitors the hard disk and identifies any problems
with them.

SATA Port 3

Multi-Sector Transfers

•

Sets the number of sectors that the disk can access at the same
time

LBA Mode Control

•

LBA (Logical Block Addressing) must be activated for disks with a
capacity of more than 528MB.

32 Bit I/O

•

This setting enables or disables 32 bit IDE data transfer .

Transfer Mode

•

Determines method of data transfer from or to drive.

Ultra DMA Mode

•

Determines the Ultra DMA data transfer mode.

SMART Monitoring

•

This function monitors the hard disk and identifies any problems
with them.

Summary of Contents for CPU 1021/A

Page 1: ...86040332 CPU 1021 A ...

Page 2: ......

Page 3: ...nual is subject to change and is in no way binding upon ASEM S p A ASEM S p A is not responsible for technical errors or other omissions in the manual and shall not accept any responsibility deriving from its use All brands or product names are registered trademarks of their respective owners ...

Page 4: ...ion of Conformity This unit is compliant with the following directives Community Directive 89 336 CEE on electromagnetic compatibility Directive 73 23 CEE on safety of electrical products and subsequent variations ...

Page 5: ...nal JP15 9 States of watch dog 9 Summary of commands 10 Summary of readable state bits 11 Management Software 11 Chapter 2 Hardware setup 13 Layout CPU 1021 A with highlighting of jumpers 14 Selection of power supply voltage of LCD panel JP1 16 Reset CMOS JP4 16 Selection BUS PCIe X1 X4 JP5 16 Bios recovery JP6 17 Display LCD resolution JP7 JP8 JP9 17 Enable controller LAN1 JP10 17 Enable warning ...

Page 6: ...dard COM3 internal 31 J27 Connectors DB9 serial ports RS232 COM1 COM2 32 J28 Connector front plate 32 J29 Connector mouse Keyboard encoder 32 J30 Dual connector for keyboard lower mouse upper PS 2 33 J31 Connector parallel interface 33 J33 J34 J35 Connector for power supply for mass memory units 34 J37 Connector power supply ATX 34 J38 Connector power button solder side 35 J39 Connector power butt...

Page 7: ...Exit menu 60 ...

Page 8: ......

Page 9: ...Description Asem S p A 1 Chapter 1 Description ...

Page 10: ...2048x1536 Video digital interface DVI output DVI on DVI D single link connector with resolution up to 1920x1200 Video RAM Up to 256MB shared Floppy disk Controller Integrated on motherboard IDE Interface for mass memories 1 bus Fast IDE Integrated on motherboard SATA Interface for mass memories 3 SATA 300Mbit s Integrated on motherboard Parallel Port 1 Integrated configurable in modes SPP ECP EPP ...

Page 11: ...is a northbridge which acts as a memory controller and integrated graphic controller It works towards the CPU with FSB up to 800MHz and on the DDR2 memory side up to 667MHz The chip Intel ICH8M is a southbridge It integrates the management of the PCI and PCIE BUS the SATA host controller for 3 ports IDE controller 1 channel with Master and Slave 8 ports USB 2 0 1 controller LAN Gigabit the power m...

Page 12: ...48 x 1536 16 M colors Support of a vast range of LCD TFT displays with LVDS interface at 1 or 2 pixel clk Control via setup of the brightness of the TFT displays In the card CPU1021 A you can set from the BIOS several modes of video outputs based on the combinations of CRT LVDS and DVI It is possible to control only LCD with LVDS input via the connector J5 that allow to control LCD panels at 6 8 b...

Page 13: ...ETUP and set the video output to the desired mode In SETUP adjust the brightness of the lamps of the LCD panel the range of values is 0 100 in steps of 10 Floppy disk controller The floppy disk controller integrated on the motherboard allows management of 1 floppy disk drives with capacity of 360 KB 720 KB 1 2 MB 1 44 MB 2 88 MB IDE controller The CPU 1021 A integrates a controller for a primary I...

Page 14: ...ment of the direction of the transmission line The port is normally in reception state If there is a transmission request it switches the line driver to transmission only for the time needed to complete it The multi standard optically insulated COM3 card is optionally available The arrangement of the addresses of I O of the IRQ s and of the standards of the ports can be selected via software by me...

Page 15: ...al connectors Two ports USB4 5 are available on the connectors on the front of the system The signals for the 2 ports USB 6 7 are present on the pin strip J18 for internal use and can be carried on to a bracket via an adaptor cable for 2 USB ports 2 0 Firmware Hub The FWH is a serial Flash of 8 Mbits that contains the system BIOS and the video BIOS The BIOS Phoenix Technologies is composed of modu...

Page 16: ...technology and allow emulation of hard disks with the possibilities reading writing and variable capacity The PATA type interface uses one of the two devices that can be connected to the primary IDE channel and with a jumper it can be set as master or slave Hardware monitor The hardware monitor device allows monitoring of the temperature of the microprocessor and of the card of the supply voltages...

Page 17: ...1 The application software will subsequently be able to read it There will then be generated a Reset based on the settings made by the user Selection of generated signal JP15 JP15 Signal generated Not inserted Watch dog disabled default inserted Generation of Reset restart system After intervention of the watch dog the LED and the bit 0 of the port 568h can be returned to the initial conditions th...

Page 18: ... port 568h To set logic state 0 for the 8 bits of port 566h To turn off the watch dog LED it is necessary to press Reset watch dog button Summary of commands The watch dog is capable of receiving the following commands from the application software Command Effect out 565h 80h Changes the watch dog from Idle state to Set out 566h nh 0 n FFh Switches state Set to Run and also must be periodically is...

Page 19: ...eadable state bits Reading of address at I O 6E8h Description BIT Low state 0 High state 1 Watch dog state 0 Not Expired Expired Management Software In the provided CD ROM you can find a device driver for the S O Windows 2000 and Windows XP ...

Page 20: ...CPU 1021 A User s Guide 12 Asem S p A ...

Page 21: ...ts limited number of hardware arrangements The use of Core 2 Duo Core Duo and Celeron M processors does not require any adjustment to power supply voltage to the frequency of Front Side Bus and to the internal multiplication factor Almost all system peripherals can be configured via software through the Setup menus ...

Page 22: ...CPU 1021 A User s Guide 14 Asem S p A Layout CPU 1021 A with highlighting of jumpers CPU 1021 A part A ...

Page 23: ...Hardware setup Asem S p A 15 CPU 1021 A part B ...

Page 24: ...ng control and Backlight table JP4 Reset CMOS JP5 Selection BUS PCIE X1 X4 JP6 BIOS recovery JP7 8 9 display LCD resolution JP10 Enable controller LAN1 JP11 Enable warning CPU temperature JP12 Reserved JP13 Reserved JP14 Reserved JP15 Reset Watch Dog JP16 17 18 Selection of type of dimming control JP21 22 Selection of power supply Selection of power supply voltage of LCD panel JP1 JP1 Function 1 2...

Page 25: ...1SA01 Ins Dis Ins 2 3 1024x768 1Pixel Clock Samsung LTM150XH Lxx Sharp LQ150X1Lxxx CMO G121X1 L03 NLT Ins Ins Dis 2 3 1280x1024 2Pixel Clock Samsung LTM170EU Lxx AUO G170EG01 V1 Ins Dis Dis 1 2 1024x768 1Pixel Clock 6 bit per color Toshiba LTA121C250F Sharp LQ190E1LW72 Dis Dis Ins 1 2 LED backlight LCD panels Enable controller LAN1 JP10 JP10 LAN1 Ins Disabled Dis Enabled Enable warning CPU tempera...

Page 26: ... 1 Watch Dog Selection of type of dimming control and Backlight JP2 JP3 JP16 JP17 JP18 JP2 JP3 JP16 JP18 JP17 inverter Ins Ins Dis Ins Toshiba VNR104C11S INV Ins Ins Dis Ins TDK CXA 0368 CAX 0509 Ins Ins Ins Dis Green Tech GH027 GH027I Ins Ins Ins Dis EVT DA1405 07 Ins Ins Ins Ins LED backlight LCD panels Selection of power supply JP21 JP22 JP21 JP22 Ins Ins ...

Page 27: ...Connectors Asem S p A 19 Chapter 3 Connectors Layout CPU 1021 A with connectors and switches highlighted ...

Page 28: ...CPU 1021 A User s Guide 20 Asem S p A Layout CPU 1021 A with highlighting of connectors CPU 1021 A front part A ...

Page 29: ...Connectors Asem S p A 21 CPU 1021 A front part B ...

Page 30: ...CPU 1021 A User s Guide 22 Asem S p A CPU 1021 A rear part A ...

Page 31: ...Connectors Asem S p A 23 CPU 1021 A rear part B ...

Page 32: ...er LED LCD J12 Connector HD SATA1 J14 Connector HD SATA2 J15 Connector HD SATA2 solder side J16 Connector HD SATA3 J17 Connector Flash Type II J18 Connector USB ports 4 5 protected J19 Connector USB ports 7 internal J20 Connector USB ports 6 internal J21 Slot riser card J22 Connector RJ45 LAN2 USB ports 2 3 J23 Connector RJ45 LAN1 USB ports 0 1 J24 Connector floppy disk J25 Connector floppy disk s...

Page 33: ...mory units J36 reserved J37 Connector power supply ATX J38 Connector power button solder side J39 Connector power button J40 Connector aux 12V Power supply External connectors The CPU 1021 A is equipped with the following connectors external controls VGA reset CPU reset Watch dog Keyboard HD activity LED LED power supply present Mouse PS 2 LAN2 LAN1 COM1 COM2 USB0 1 USB2 3 Housing for Fieldbus mod...

Page 34: ...2V for system PIN Signal 1 GND 2 12 V modulated from PWM 3 SPEED J3 Connector for two tachometric fans 12V for CPU PIN Signal 1 GND 2 12 V modulated from PWM 3 SPEED FAN B 4 SPEED FAN A J5 Connector LVDS 6 8 bit color LCD PIN Signal PIN Signal 1 TXA0 2 TXA0 3 TXA1 4 TXA1 5 TXA2 6 TXA2 7 GND 8 GND 9 TCLKA 10 TCLKA 11 TXA3 12 TXA3 13 TXB0 14 TXB0 15 TXB1 16 TXB1 ...

Page 35: ...gnal PIN Signal PIN Signal 1 Red 6 GND Red 11 NC 2 Green 7 GND Green 12 SDA 3 Blue 8 GND Blue 13 H sync 4 N C 9 5V 14 V sync 5 GND Sync 10 GND Sync 15 SCL J10 Connector DVI D PIN Signal PIN Signal PIN Signal 1 TX 2 9 TX 1 17 TX 0 2 TX 2 10 TX 1 TX 0 3 GND 11 GND GND 4 NC 12 NC NC 5 NC NC NC 6 DDC_CLK 14 VCC fuse GND 7 DDC_DAT 15 GND TXCLK 8 VSINC 16 hpdet TXCLK ...

Page 36: ...nnector HD SATA1 2 PIN Signal 1 GND 2 TX 3 TX 4 GND 5 RX 6 RX 7 GND J17 Connector Compact Flash IDE 50 pin type I II PIN Signal PIN Signal 1 GND 26 N C 2 DATA 3 27 DATA 11 3 DATA 4 28 DATA 12 4 DATA 5 29 DATA 13 5 DATA 6 30 DATA 14 6 DATA 7 31 DATA 15 7 IDE CHIP SELECT 1 32 IDE CHIP SELECT 3 8 GND 33 N C 9 GND 34 I O READ 10 GND 35 I O WRITE ...

Page 37: ... 43 DRQ A2 19 A1 44 AKJ 20 A0 45 IDE ACTIVITY 21 DATA 0 46 PDIAG 22 DATA 1 47 DATA 8 23 DATA 2 48 DATA 9 24 N C 49 DATA 10 25 N C 50 GND J18 Connector USB ports 4 5 protected USB4 USB5 PIN Signal PIN Signal 1 5V 2 5V 3 Data 4 Data 5 Data 6 Data 7 GND 8 GND 9 non presente 10 N C J19 J20 Connector USB ports 7 6 internal PIN Signal 1 Vcc 2 D 3 D 4 GND ...

Page 38: ...TRACK 0 21 GND 22 WRITE PROTECT 23 GND 24 READ DATA 25 GND 26 HEAD SELECT J25 Connector floppy disk solder side PIN Signal PIN Signal 1 GND 2 RWC 3 GND 4 N C 5 GND 6 N C 7 GND 8 INDEX 9 GND 10 MOTOR 1 11 GND 12 DRIVESEL 2 13 GND 14 DRIVESEL 1 15 GND 16 MOTOR 2 17 GND 18 DIRECTION 19 GND 20 STEP 21 GND 22 WRITE DATA 23 GND 24 WRITE ENABLE 25 GND 26 TRACK 0 27 GND 28 WRITE PROTECT 29 GND 30 READ DAT...

Page 39: ...15 Below is the pinout of the DB15 PIN Signal I O 1 5V OUT 2 Transmit Data RS 232 OUT 3 Receive Data RS 232 IN 4 Request to Send RS 232 OUT 5 Clear to Send RS 232 IN 6 Data Set Ready RS 232 IN 7 GND 8 Data Terminal Ready RS 232 OUT 9 Data Carrier Detect RS 232 IN 10 Transmit Data Receive Data RS 485 RS 422 I O 11 Transmit Data Receive Data RS 485 RS 422 I O 12 Ring Indication RS 232 IN 13 Receive ...

Page 40: ...al Ready OUTPUT 5 GND 6 Data Set Ready INPUT 7 Request To send OUTPUT 8 Clear To send INPUT 9 Ring Indicator INPUT J28 Connector front plate PIN Signal PIN Signal 1 H 2 X XL 3 S XR 4 Y YT 5 L YB 6 LED LAN 7 LED FAULT 8 LED HD 9 GND 10 5V J29 Connector mouse Keyboard encoder PIN Signal PIN Signal 1 non presente 2 N C 3 MOUSE CLOCK 4 5 V 5 GND 6 MOUSE DATA 7 5V 8 GND 9 KEYBOARD DATA 10 KEYBOARD CLOC...

Page 41: ...nal 1 Data 2 6 N C 3 GND 4 5 V 5 CLOCK J31 Connector parallel interface Connector J31 provides the users with a parallel port through the installation of an optional plate This has an external connector DB25 PIN Signal PIN Signal 1 STROBE 14 AUTOFEED 2 DATA 0 15 ERROR 3 DATA 1 16 INIT 4 DATA 2 17 SELECT IN 5 DATA 3 18 GND 6 DATA 4 19 GND 7 DATA 5 20 GND ...

Page 42: ...ND 11 BUSY 24 GND 12 PAPER EMPTY 25 GND 13 SELECT J33 J34 J35 Connector for power supply for mass memory units PIN Signal 1 12V 2 3 GND 4 5V J37 Connector power supply ATX PIN Signal 1 3 3V 2 3 3V 3 GND 4 VCC 5V 5 GND 6 VCC 5V 7 GND 8 N C 9 5VSB 10 12V 11 3 3V 12 12V 13 GND 14 PS ON ...

Page 43: ... 17 GND 18 5V 19 VCC 5V 20 VCC 5V J38 Connector power button solder side PIN Signal 1 Reset 2 GND J39 Connector power button solder side PIN Signal 1 Reset 2 GND J40 Connector aux 12V Power supply PIN Signal 1 GND 2 GND 3 V12 4 V12 ...

Page 44: ...eset button SW1 Watch dog reset button The button is used to reset the watch dog state after it has been activated and after the count has reached the time expiration Refer to the paragraphWatch dog for further information SW2 Reset button The button is used to place the machine in the initial state after power up ...

Page 45: ...Map of memory Asem S p A 37 Chapter 4 Map of memory ...

Page 46: ... 060 064 Keyboard controller 061 Port B for the control of the system 065 07F Reserved 080 08F DMA page register 090 09F Reserved 0A0 0A1 Interrupt controller 2 0A2 0BF Reserved 0C0 0DF DMA controller 2 channels 4 7 0F0 0FF Math coprocessor 170 177 Secondary IDE channel 180 187 Watch dog LCD contrast adjustment 1F0 1F7 IDE primary channel 274 279 Reserved 2E8 2EF Serial port 4 376 Secondary IDE ch...

Page 47: ...00000 09FFFF RAM dynamic 0A0000 0BFFFF Video memory 0C0000 0CFFFF VGA BIOS 0E0000 0FFFFF System BIOS 100000 FFFFFFFF Extended Memory DMA channels Channel Controller I O Memory Maximum transfer Description 0 1 8 bit 8 16 bit 64 KB Memory refresh 2 1 8 bit 8 16 bit 64 KB Floppy disk Drive 3 1 8 bit 8 16 bit 64 KB free 4 2 16 bit 16 bit 128 KB DMA controller 1 5 2 16 bit 16 bit 128 KB free 6 2 16 bit...

Page 48: ...ler 2 not available on AT bus IRQ3 1 00B Serial Port 2 IRQ4 1 00C Serial Port 1 IRQ5 1 00D Free IRQ6 1 00E Floppy disk controller IRQ7 1 00F Parallel Port 1 IRQ8 2 070 Real time clock not available on AT bus IRQ9 2 071 Reserved IRQ10 2 072 Free possible COM3 IRQ11 2 073 Free possible COM4 IRQ12 2 074 Mouse PS 2 IRQ13 2 075 Math coprocessor IRQ14 2 076 Primary IDE channel IRQ15 2 077 Secondary IDE ...

Page 49: ...BIOS Setup Asem S p A 41 Chapter 5 BIOS Setup ...

Page 50: ...hange one of the operating options of the system You may also need to use Setup to correct the system configuration following an error message during the self diagnostic test How to activate the Setup When the system is started or following a Reset or at the end of the self diagnostic test the following message appears on the video PRESS F2 TO ENTER SETUP You can now launch the program Setup by pr...

Page 51: ...e of processor installed CPU Speed Shows the speed of the installed processor System memory Shows the value of the conventional memory detected during system boot up Extended Memory Extended memory over first MB detected during diagnostic functions at start up fully available to the operating system System Time To select the time use the keys and Then confirm with ENTER System Date To select the d...

Page 52: ...han 528MB 32 Bit I O This setting enables or disables 32 bit IDE data transfer Transfer Mode Determines method of data transfer from or to drive Ultra DMA Mode Determines the Ultra DMA data transfer mode IDE Channel 0 Slave Multi Sector Transfers Sets the number of sectors that the disk can access at the same time LBA Mode Control LBA Logical Block Addressing must be activated for disks with a cap...

Page 53: ...ansfers Sets the number of sectors that the disk can access at the same time LBA Mode Control LBA Logical Block Addressing must be activated for disks with a capacity of more than 528MB 32 Bit I O This setting enables or disables 32 bit IDE data transfer Transfer Mode Determines method of data transfer from or to drive Ultra DMA Mode Determines the Ultra DMA data transfer mode SMART Monitoring Thi...

Page 54: ...ltra DMA data transfer mode SMART Monitoring This function monitors the hard disk and identifies any problems with them SATA Port 3 Multi Sector Transfers Sets the number of sectors that the disk can access at the same time LBA Mode Control LBA Logical Block Addressing must be activated for disks with a capacity of more than 528MB 32 Bit I O This setting enables or disables 32 bit IDE data transfe...

Page 55: ...isk Small LBA Disk CHS Translation Determines whether translation of the CHS must be done for LBA compatible hard disks with less than 1024 cylinders e g Compact Flash Legacy USB Support This parameter must be enabled if the computer includes a USB keyboard and the user also wants to use this keyboard in a DOS environment or prior to loading the operating system in the start menu for example If th...

Page 56: ...echanism of the BIOS video area Cache Base 0 512K Caching mechanism of the base memory 512k Cache Base 512 640K Caching mechanism of the base memory 512k 640k Cache Extended Memory Area Caching system of system memory over a megabyte Cache A000 AFFF Cache B000 BFFF Cache C800 CBFF Cache CC00 CFFF Cache D000 D3FF Cache D400 D7FF Cache D800 DBFF Cache DC00 DFFF ...

Page 57: ...y disables this field if a Celeron M processor is detected GV3 Only default with Core processors Enables the Enhanced Intel Speedstep Technology C States Only Allows to register CPU Power Saving conditions after an inactivity period Enabled both GV3 and C States are enabled Thermal Control Circuit Enables the Thermal Control Circuit Disabled no action CPU will work also with critical temperatures ...

Page 58: ...ol Sub menu GMCH Power Management Mode Default Legacy Allows Enhanced Power Management of the Northbridge register PMCFG MCHBAR offset F10h bit 4 This mainly concerns the power down of the memory in power saving states C3 and C4 and transition to states C3 and C4 if the busmaster is active If the C States are not used leave the default setting Legacy C2 to C3 Transition Timer Default 6h Reserved C...

Page 59: ...IGD Device 2 Disabled disables the integrated graphic device Auto default enables the integrated graphic device IGD Device 2 Function 1 Disabled disables the second graphic device Auto default enables the second graphic device IGD Boot Type Lets you select the type of display that will be used during the bootstrap CRT LFP SDVO default allows use of both displays CRT and LCD Other settings the sele...

Page 60: ...echnology It defines the amount of memory which will be assigned for the integrated video Fixed Fixed graphic memory will be assigned DVTM default Only the pre assigned memory will be assigned during start up Further memory is assigned if necessary during start up Combo Combines the functions Fixed and DVMT Pre Allocated Memory Size 8MB Determines the sum of the pre assigned memory for the integra...

Page 61: ...BIOS Setup Asem S p A 53 DVMT Graphics Memory Indicates the amount of memory assigned to the DVMT Default 120MB ICH Control Sub Menu Integrated Device Control Sub Menu ...

Page 62: ...enu Controls the port PCI Express PCI Express Root Port 1 Default Auto PCI Express Root Port 2 Default Auto PCI Express Root Port 3 Default Auto PCI Express Root Port 4 Default Auto PCI Express Root Port 5 Default Auto PCI Hot Plug Resources Default Disabled Root Port ASPM Support Default Auto ...

Page 63: ...enu Device 29 Function 0 3 Enable Enabling of 8 USB ports Device 29 Function 1 3 Enable Enabling of 8 USB ports Device 29 Function 2 3 Enable Enabling of 8 USB ports Device 29 Function 3 Enable Enabling of 8 USB ports CH Sata Pata Control Sub Menu ...

Page 64: ... installation of the operating system without the need of the SATA drivers during installation Enhanced SATA controller in native mode AHCI configuration Disable Enable Disable Vacant Ports Automatically activates disabling of the non connected SATA interfaces Disabled default The non connected SATA ports are not automatically disabled Enabled The non connected SATA ports are automatically disable...

Page 65: ...hibernate Default Enabled FACP PM Timer Flag Value Controls the ACPI flag USE_PLATFORM_CLOCK see the ACPI specifications which signals to the ACPI OS whether it can use ACPI power management timer Enabled or another timer Disabled Default Disabled HPET Support Enables the High Performance Event Timer an advanced HW timer that can be used by new ACPI OS WinXP or new Requires enablement of the param...

Page 66: ... CK 410 Clock Chip Default Program The synthesizer that provides the Spread Spectrum is set to the mode Program programmable Spread Spectrum Mode Default Off The Spread Spectrum is disabled Off Security Set Supervisor Password This password controls access to the setup Set User Password Lets you set the user password Password on boot If enabled the password will be requested prior to the bootstrap...

Page 67: ...S p A 59 Boot Boot Options Boot priority order 1 USB KEY 2 USB FDC 3 USB HDD 4 IDE CD 5 USB CD ROM 6 IDE HDD 1 7 IDE HDD 2 8 Excluded from boot order USB ZIP USB LS120 PCI SCSI PCI DEV Other USB PCI Legacy Network Card ...

Page 68: ...e selected settings Exit Discarding Changes Let s you exit Setup without saving the selected settings Load Setup Defaults Let s you exit Setup and load the default settings Discard Changes Let s you exit Setup and load the previous configuration Save Changes Let s you save the changes you have made ...

Page 69: ...Printed by ASEM S p A Via Buia 4 33011 Artegna UD Italy Tel 0432 967111 Fax 0432 977465 http www asem it asem asem it ...

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