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Maps and Registers
ATCA-7480 Installation and Use (6806800T17A)
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5.1.16.6 Interrupt Mask and Map Registers
Interrupts from different interrupt sources including the External Interrupt sources can be
mapped to any IRQ Frame number of the serialized IRQ protocol.
Multiple interrupt sources may share the same IRQ Frame. In this case all interrupt sources need
to be of type “level active low”.
Each interrupt source has an Interrupt Mask and Map Register. See Table 5-72 .
7:1 - Reserved 0 r
Table 5-71 External Interrupt Status Register
Address Offset: 0x24
Bit Signal/Group Description Default Access
Table 5-72 Address Map of Interrupt Mask and Map Registers
Interrupt Source(s) Description
Address Offset of
Interrupt Mask
IPMC to Host
Interrupt IPMC signals interrupt 0x25
Telecom Interrupt Telecom Interrupt. 0x26
RTM_SPI_MISO RTM interrupt sources 0x27