Artesyn ATCA-7480, Installation And Use Manual, Page: 117 / 330

Maps and Registers
ATCA-7480 Installation and Use (6806800T17A)
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5.1.4.2.7 Modem Control Register (MCR)
This 8-bit register controls the interface with the modem or data set (or a peripheral device
emulating a modem).
Table 5-32 Modem Control Register (MCR)
LPC IO Address: Base + 4
Bit Description Default Access
0 Data terminal ready (DTR#) output control:
1: DTR# output in low (active) state
0: DTR# output in high state 0 LPC: r/w
1 Request to send (RTS#) output control:
1: RTS# output in low (active) state
0: RTS# output in high state 0 LPC: r/w
2 User output control signal (OUT1#):
1: OUT1# output in high state
0: OUT1# output in low state
Not supported 0 LPC: r/w
3 User output control signal (OUT2#):
1: OUT2# output in high state
0: OUT2# output in low state
Not supported 0 LPC: r/w
4 Local loop back diagnostic control
When loop back is activated: Transmitter TXD is set high.
Receiver RXD is disconnected. Output of Transmitter Shift
register is looped back into the receiver shift register input.
Modem control inputs are disconnected Modem control
outputs are internally connected to modem control inputs.
Modem control outputs are forced to the inactive (high)
levels:
1: Loop back mode activated
0: Normal operation 0 LPC: r/w