Artesyn ATCA-7360, Installation And Use Manual

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Functional Description
ATCA-7360 Installation and Use (6806800J07S )
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Two 8237 DMA controller
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8254 based Counter Timer/timers
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High precision Event timers (HPET)
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RTC with 256-byte battery-backed SRAM
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System TCO (total cost of ownership) Reduction circuits
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SMBus interface
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Two stage Watchdog timer
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PCI 2.3 interface 32-bit/ 33 MHz (connects to PMEM module)
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General purpose I/O pins
5.6 Firmware Flashes
The blade has two physically separate 1 MB flash devices hosting the BIOS firmware:
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Primary (or Default BIOS) Flash (SPI 0)
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Recovery BIOS Flash (SPI 1)
The flash is allocated for storing the binary code of the BIOS. The ATCA-7360 boots from the
primary flash SPI 0 under normal circumstances. If booting BIOS from primary flash SPI 0 fails,
a hardware mechanism automatically changes the flash device select logic to boot from the
recovery flash SPI 1. The image that the processor will boot from after next reset is determined
by the IPMC. It can be selected via dedicated IPMI OEM command.
ATCA-7360 does not provide a legacy Super-I/O device and no legacy Keyboard/Mouse
interface. Keyboard and Mouse are supported through USB. Serial COM Interfaces are
provided from FPGA.