Artesyn Embedded Technology ATCA-7370, Installation And Use Manual

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BIOS
ATCA-7370/ATCA-7370-S Installation and Use (6806800P54G)
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4.1.2 DRAM Support
The BIOS supports the following features of the memory controller:

Autosizing - The BIOS reads the Serial Presence Detect (SPD) data from the memory
modules and automatically configures the chipset accordingly.

ECC Support
– Single Bit Errors (SBE) can be detected, corrected and logged. Multi-Bit Errors (MBE)
can be detected but not corrected.
– By default, BIOS enables ECC support in the chipset. However the BIOS setup menu
provides an option to enable or disable ECC.
– ECC Error Report Support: ATCA-7370 supports ECC error reporting. When an ECC
error occurs, the memory controller hardware increments an ECC error count and
triggers the SMI interrupt to let BIOS or OS handle the ECC error.
– The ECC counter is cleared at power cycle reset. The counter is preserved during a cold
reset, warm reset and S3 suspend/resume.
– The SMI routine is used to handle ECC error report on both the BIOS and OS. The ECC
error log is stored in the BIOS SPI Flash. After Linux is booted up, the Error Detection
and Correction Module (EDAC) is also used to count the ECC error.
– Correctable ECC Logging and Threshold setting in "BIOS setup / Advanced":
Menu Item Default Description
Memory ECC
Error Log Both This item selects the ECC Runtime errors which
are to be logged in the SMBIOS event log.
Correctable
ECC Logging
Threshold 1 This item is used to enter the correctable error
threshold value if "Memory ECC Error Log" is
not disabled. The logging threshold is based
per memory rank, not per DIMM or overall.
Memory
Configuration /
Correctable
ECC Flooding
Threshold 100 This item is used to set the error logging limit
value per second if "Memory ECC Error Log" is
not disabled. If the number of correctable ECC
error logs produced per second reaches the
flood threshold, the correctable ECC error
reporting is disabled. The flood threshold is an
overall setting.