ADSP-21065L SHARC User’s Manual 1-9
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The rest of this chapter summarizes the architectural features of the
ADSP-21065L SHARC:
• DSP core
• Dual-ported memory
• External port interface
• Host processor interface
• I/O Processor
• Serial ports
• DMA controller
• Booting
• Development tools
The remaining chapters of this manual describe these features in detail.
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The ADSP-21065L’s DSP core consists of:
• Three computation units
• A data Register File
• A Program Sequencer and two Data Address Generators
• An Instruction Cache
• DSP core buses
