ADSP-21065L SHARC User’s Manual 1-23
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16K
×
32bit (544 Kbits)
of user-configurable
internal memory
•
Reduces bottlenecks over accesses
of off-chip memory.
•
Reduces overall system cost, size,
and power consumption.
•
Provides freedom in allocating
data and program memory.
240 Mbit/sec. I/O
•
2 serial Tx and
2 serial Rx serial
ports
•
I
2
S Interface
•
Process more audio channels using
just one DSP.
•
Multiple channels supported in
communication systems.
10 DMA channels
Implement multifunction applications
on one chip.
TDM serial ports
•
Direct interface to T1 and E1
lines.
•
Ability to communicate with other
ADSP-21065Ls.
Glueless SDRAM interface
•
Maximize synchronous data transfer
rate.
•
Reduce overall system cost.
Table 1-1. Summary of ADSP-21065L features and benefits (Cont’d)
Feature
Benefits
