Port Features
Page 56
7710 SR OS Interface Configuration Guide
APS Protection Switching Byte Failure
An APS Protection Switching Byte (APS-PSB) failure indicates that the received K1 byte is either
invalid or inconsistent. An invalid code defect occurs if the same K1 value is received for 3
consecutive frames (depending on the interface type (framer) used, the 7750 SR7450 ESS may not
be able to strictly enforce the 3 frame check per GR-253 and G.783/G.841) and it is either an
unused code or irrelevant for the specific switching operation. An inconsistent APS byte defect
occurs when no three consecutive received K1 bytes of the last 12 frames are the same.
If the failure detected persists for 2.5 seconds, a Protection Switching Byte alarm is raised. When
the failure is absent for 10 seconds, the alarm is cleared. This alarm can only be raised by the
active port operating in bi-directional mode.
APS Channel Mismatch Failure
An APS channel mismatch failure (APS-CM) identifies that there is a channel mismatch between
the transmitted K1 and the received K2 bytes. A defect is declared when the received K2 channel
number differs from the transmitted K1 channel number for more than 50 ms after three identical
K1 bytes are sent. The monitoring for this condition is continuous, not just when the transmitted
value of K1 changes.
If the failure detected persists for 2.5 seconds, a channel mismatch failure alarm is raised. When
the failure is absent for 10 seconds, the alarm is cleared. This alarm can only be raised by the
active port operating in a bi-directional mode.
APS Mode Mismatch Failure
An APS mode mismatch failure (APS-MM) can occur for two reasons. The first is if the received
K2 byte indicates that 1:N protection switching is being used by the far-end of the OC-N line,
while the near end uses 1+1 protection switching. The second is if the received K2 byte indicates
that uni-directional mode is being used by the far-end while the near end uses bi-directional mode.
This defect is detected within 100 ms of receiving a K2 byte that indicates either of these
conditions.
If the failure detected persists for 2.5 seconds, a mode mismatch failure alarm is raised. However,
it continues to monitor the received K2 byte, and should it ever indicate that the far-end has
switched to a bi-directional mode the mode mismatch failure clearing process starts.
When the failure is absent for 10 seconds, the alarm is cleared, and the configured mode of 1+1
bidirectional is used.
Summary of Contents for 7710 SR OS
Page 6: ...Page 6 7710 SR OS Interface Configuration Guide Table of Contents...
Page 8: ...Page 8 7710 SR OS Interface Configuration Guide List of Tables...
Page 10: ...Page 10 7710 SR OS Interface Configuration Guide List of Figures...
Page 14: ...Preface Page 14 7710 SR OS Interface Configuration Guide...
Page 16: ...Getting Started Page 16 7710 SR OS Interface Configuration Guide...
Page 100: ...Configuration Process Overview Page 100 7710 SR OS Interface Configuration Guide...
Page 142: ...Service Management Tasks Page 142 7710 SR OS Interface Configuration Guide...
Page 428: ...Debug Commands Page 428 7710 SR OS Interface Configuration Guide...
Page 434: ...Standards and Protocols Page 434 Standards and Protocols...
Page 436: ...Page 436 7710 SR OS Interface Configuration Guide...