
Operations
39
PXIe-9834
3.7 Synchronizing Multiple Modules
Analog input channels on a single module, sharing the same time-
base and trigger signals, are automatically synchronized. When
synchronizing analog input channels between modules, however,
correct module configuration and timebase and trigger signal wir-
ing are critical for optimum synchronization.
Digitizer modules such as the PXIe-9834 support trigger synchro-
nization and timebase synchronization.
Trigger synchronization implements a signal that initiates acquisi-
tion, and timebase synchronization provides the fundamental
clock for AD operation.
As shown in the following, two digitizer modules operating at
diverse onboard clock and trigger signals (free run) result in not
only trigger time difference, but also clock phase error.
Figure 3-14: Non-synched Digitizer Modules
CLK#1
ADC
ADC
ADC
ADC
Digitizer
Controller
Decision
Digitizer Module #1
CLK#2
ADC
ADC
ADC
ADC
Digitizer
Controller
Trigger
Decision
Digitizer Module #2
TRG#1
TRG#2
Trigger delay
Clock Phase Error
TRG#1
TRG#2
CLK#1
CLK#2
Trigger
Summary of Contents for PXIe-9834
Page 6: ...vi Preface Leading EDGE COMPUTING This page intentionally left blank ...
Page 10: ...x List of Figures Leading EDGE COMPUTING This page intentionally left blank ...
Page 12: ...xii List of Tables Leading EDGE COMPUTING This page intentionally left blank ...
Page 17: ...Introduction 5 PXIe 9834 Figure 1 2 Typical Frequency Response 50Ω input impedance ...
Page 30: ...18 Introduction Leading EDGE COMPUTING This page intentionally left blank ...
Page 34: ...22 Getting Started Leading EDGE COMPUTING This page intentionally left blank ...
Page 60: ...48 Calibration Leading EDGE COMPUTING This page intentionally left blank ...
Page 64: ...52 Important Safety Instructions Leading EDGE COMPUTING This page intentionally left blank ...