ADLINK Technology cPCI-6810, User Manual

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64 Appendix
Not available means that an additional onboard EEPROM is
required to store information. This requires a modification of the
A3 version board - the A2 version board does not have the
EEPROM.
IPMI Address Map
The IPMI address of the SBC is defined by GA pins which is
relative to the physical slot the SBC is installed on. The following
table shows the relationship between the IPMI address and the
Slot number SBC installed.
Note: (1) Supported on PCB rev.A3 or higher.
(2) The SDR information are read-only.
(3) The SEL storage is not supported random access.
Address (Hex) CompactPCI Slot
B0 Peripheral Slot1
B2 Peripheral Slot2
B4 Peripheral Slot3
B6 Peripheral Slot4
B8 Peripheral Slot5
BA Peripheral Slot6
BC Peripheral Slot7