Configurable Options
MEMORY ADDRESS SELECTION (20- VS. 24-BIT)
The ZT 8825 is designed to use the multiplexed 20-bit memory
addresses as specified by the STD-80 Series standard. The extra four
address bits (A16 to A19) are multiplexed onto the data bus (bits 0 to
3) at the beginning of each cycle when MCSYNC* is asserted. This
does not add any additional time overhead to the typical 8088 cycle.
The MEMEX signal is not used on this board. For 24-bit memory
addresses from 80286, 80386 & 68K processors, there are eight bits
multiplexed (A16 to A23) in the same manner. Install Jumpers W2-5
for 24-bit addressing.
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