27
MG166CX-USB/MG166CX/MG166C-USB/MG166C
■
LSI PIN DESCRIPTION
（LSI端子機能表）
CONTENTS
（目次）
•
AK5381VT-E2
(X5219A00)
ADC (Analog to Digital Converter)
............ 27
•
MX23L8103TC-90G
(X5922A00)
CPU
..................................................... 28
•
PCM1742KEG/2K
(X3538A00)
DAC (Digital to Analog Converter)
...... 27
•
PCM2900E/2K
(X7143A00)
CODEC
........................................................ 28
•
YMW767-VTZ
(X6055A00)
CPU
.............................................................. 29
•
AK5381VT-E2
(X5219A00)
ADC (Analog to Digital Converter)
DSP: ICM04
1
2
3
4
5
6
7
8
AINR
AINL
CKS1
VCOM
AGND
VA
VD
DGND
Rch analog input pin
Lch analog input pin
Mode select 1 pin
Common voltage output pin
Analog ground
Analog power supply
Digital power supply
Digital ground
I
I
I
O
-
-
-
-
PIN
No.
NAME
FUNCTION
I/O
PIN
No.
NAME
I/O
FUNCTION
9
10
11
12
13
14
15
16
SDTO
LRCK
MCLK
SCLK
PDN
DIF
CKS2
CKS0
O
I/O
I
I/O
I
I
I
I
Audio serial data output pin
Output channnel clock pin
Master clock input pin
Audio serial data clock pin
Power down mode pin
Audio interface format pin
Mode select 2 pin
Mode select 0 pin
•
PCM1742KEG/2K
(X3538A00)
DAC (Digital to Analog Converter)
DSP: ICM08
1
2
3
4
5
6
7
8
BCK
DATA
LRCK
DGND
VDD
Vcc
VOUTL
VOUTR
Audio data bit clock input
Audio data digital input.
L-channel and R-channel audio data latch enable
input
Digital ground
Digital power supply, +3.3 V
Analog power supply, +5 V
Analog output for L-channel
Analog output for R-channel
I
I
I
-
-
-
O
O
PIN
No.
NAME
FUNCTION
I/O
PIN
No.
NAME
I/O
FUNCTION
9
10
11
12
13
14
15
16
AGND
VCOM
ZEROR/ZEROA
ZEROL/NA
MD
MC
ML
SCK
-
-
O
O
I
I
I
I
Analog ground
Common voltage decoupling.
Zero flag output for R-channel/Zero flag output
for L/R-channel
Zero flag output for L-channel/No assign
Mode control data Input
Mode control clock input
Mode control latch input
System clock input
Note:
(1) Schmitt trigger input, 5V tolerant.
(2) Schmitt trigger I/O with internal pull-down, 5V tolerant.
