Yamaha AD8HR, Руководство по обслуживанию

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AD8HR
17
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
DAUX
HDLT
DOUT
VFL
OPT
SYNC
MCC
WC
MCB
MCA
SKSY
XI
XO
P256
LOCK
Vss
TC
DIM1
DIM0
DOM1
DOM0
KM1
I
O
O
O
O
O
O
O
O
O
I
I
O
O
O
O
I
I
I
I
I
Auxiliary input for audio data
Asynchronous buffer operation flag
Audio data output
Parity flag output
Fs x 1 Synchronous output signal for DAC
Fs x 1 Synchronous output signal for DSP
Fs x 64 Bit clock output
Fs x 1 Word clock output
Fs x 128 Bit clock output
Fs x 256 Bit clock output
Clock synchronization control input
Crystal oscillator connection or external
clock input
Crystal oscillator connection
VCO oscillating clock connection
PLL lock flag
Logic section power (GND)
PLL time constant switching output
Data input mode selection
Data input mode selection
Data output mode selection
Data output mode selection
Clock mode switching input 1
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
RSTN
Vdda
CTLN
PCO
(NC)
CTLP
Vssa
TSTN
KM2
KM0
FS1
FS0
CSM
EXTW
DDIN
LR
Vdd
ERR
EMP
CD0
CCK
CLD
I
I
O
I
I
I
I
O
O
I
I
I
O
O
O
O
I
I
System reset input
VCO section power (+5V)
VCO control input N
PLL phase comparison output
VCO control input P
VCO section power (GND)
Test terminal. Open for normal use
Clock mode switching input 2
Clock mode switching input 0
Channel status sampling frequency
display output 1
Channel status sampling frequency
display output 0
Channel status output method selection
External synchronous auxiliary input
word clock
EIAJ (AES/EBU) data input
PLL word clock output
Logic section power (+5 V)
Data error flag output
Channel status emphasis control code
output
3-wire type microcomputer interface data
output
3-wire type microcomputer interface clock
input
3-wire type microcomputer interface load
input
YM3436DK (XG948E00) DIR2 (Digital Format Interface Receiver)
MAIN: IC59
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VREFL
AV
SS
VCOM
LIN+
LIN-
CKS0
DV
DD
DV
SS
OVF
PDN
DIF
M/S
LRCK
BICK
I
-
O
I
I
I
-
-
O
I
I
I
I/O
I/O
Lch Voltage Reference Input Pin, AVDD
Analog Ground Pin
Common Voltage Output Pin, AVDD/2
Lch Analog Positive Input Pin
Lch Analog Negative Input Pin
Master Clock Select 0 Pin
Digital Power Supply (3.0~5.25V)
Digital Ground
Analog Input Overflow Detect Pin
Power Down Mode Pin
Audio Interface Format Pin
Master / Slave Mode Pin
Output Channel Clock Pin
Audio Serial Data Clock Pin 15
16
17
18
19
20
21
22
23
24
25
26
27
28 SDTO
CKS1
MCLK
DFS0
HPFE
DFS1
BV
SS
AV
SS
AV
DD
RIN-
RIN+
TEST
AV
SS
VREFR
O
I
I
I
I
I
-
-
-
I
I
I
-
I
Audio Serial Data Output Pin
Master Clock Select 1 Pin
Master Clock Input Pin
Sampling Speed Select 0 Pin
High Pass Filter Enable Pin
Sampling Speed Select 1 Pin
Substrate Ground Pin
Analog Ground Pin
Analog Power Supply Pin (4.75~5.25V)
Rch Analog Negative Input Pin
Rch Analog Positive Input Pin
Test Pin
Analog Ground
Rch Voltage Reference Input Pin, AVDD
AK5385AVS-E2 (X4662A00) ADC
MAIN: IC105, 305, 505, 705