Yaesu FT-902DM, Инструкция по эксплуатации

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C I R C U I T D ES C R I PTI O N
This transceiver utilizes PLL (Phase Locked Loop )
circuitry. The receiver is a single-conversion type
with a 8 . 9 8 7 5 MHz IF. The following circuit des­
cription is tailored to the full-feature FT-902DM,
and some o f the features and circuitry described
below are optional on the FT-902D/SD/DE
m od els.
RECEIVER
The RF input signal from the antenna is fed to pin
3
of the RF UNIT
( P B-2 1 54
)
1
via antenna relay
R L2 , line fuse F H 1 , attenuator switch S2 1 0 3 , input
transformer T 1 , and 9 MHz trap coil T 2 4 0 2 .
RF U NIT (PB-2 1 54 )
T h e incoming signal is amplified by t h e RF ampli­
fier Q 1 0 1
( 3 SK5 1 -03 ) ,
a dual gate M O S F ET which
h as superior rejection against cross m o dulation.
The amp lified signal is then fed to the first m ixer
Q 10 2
( ND4 87C2-3 R ) , a Schottky-barrier double­
b alanced mixer, for excellent intercept character­
istics. The RF signal is mixed with a local signal
d elivered from the LOCAL UNIT, resu lting in a
8 . 9 8 7 5 M Hz first IF. The IF signal is then ampli­
fied b y 0 1 0 3
( J 3 1 0 )
and delivered to the F I LTER
U NIT.
The inpu t and ou tput of the R F amplifier are
perme ability tuned circuits , resulting in h igh
sensitivity with ex cellent rejection of unwan ted
ou t-of-band signals.
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