Yaesu FT-902DM, Инструкция по эксплуатации

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tor) . The microphone signal is fe d to pin
17
o f
t h e
CA R R I E R UNIT,
amplified by 0 7 0 6 (TA
7063P ) , and fed to 0 7 0 7 ( 2SC1 8 1 S GR). When a su ffi­
cien t level of speech inpu t is applied to the m icro­
phon e , 0 7 0 7 c o n d u c t s , causing the ou tpu t of
N A N O
gate 07 0 8 ( MC I 40 1 I B ) to be " l ow . "
This c ondi tion c u t s off
AMGC
con troll er 0 7 0 9
( 2 SC 1 8 1 S Y ) . Th e collector circuit of Q 7 0 9 is
connected with the outpu t circu i t o f the m icro­
phone amplifi e r Q 7 0 5 .
When the m i c roph o n e i n p u t signal becomes signi­
fican tly l ower than the n orm al speech level (back­
ground n oise only ) , Q 7 0 7 turns
O F F ,
cau si n g the
o u t p u t of Q 7 0 8 t o be "high . " This c on d i tion
causes Q 7 0 9 to c o n d u c t , grou n d ing the o u t p u t
circu i t of Q 7 0 5 .
The ga te holding t i m e can be adjusted by m e an s
o f Y R 7 0 2 , t o a l l o w for d i fferences i n opera tor
prefere nces.
EXT ANTI TR I P
17
I
I
I
R616 100
I0.1.1
Jl7 7
SIDE TONE
5
TONE OUT
VOX UNIT P B - 1 8 4 6
A p ortion o f the microphone inpu t i s d elivered
to pin
10
o f the
VOX UN IT. The signal is ampli­
fied by 06 0 8 and Q 6 0 9 ( 2 SC 1 8 1 SGR ) and fed
t o the
b ase of 0 6 1 0 ( 2SCI 8 1 SGR )When
the signal is applied ,
0 6 1 0 conducts, causing
C
6 2 1 to
discharge . The
DC
voltage of C 6 2 1
is then
fed
to the gate circuit
o f Q 6 0 4 ( MC 1 40 1
l
B ) .
When pins
I
and 2 of
Q604
are high, the ou tput
of
the
VOX gate of
Q604
becomes l o w ,
causing
Q 6 0 6 ( 2 SC 1 8 1 S Y )
to cut
o ff, thus turning relay d river Q 6 0 7 ( 2SC7 3 S )
ON
t o actuate t
he VOX
relay R L 1 .
The a n t i trip
circuit provides a bucking voltage
t o
prevent the speaker output from tripping the
transceiver
in
to
the transmit con di ti on.
The
receiver aud io
output is
fed
through
ANTITRIP
con trol Y R 6 0 1 t o
amplifier
Q60 1
( 2 SC 1 8 1 S Y )
a n d is then rec tified b y
060 1
( 1 N60).
The rectified
DC
voltage turns Q 6 0 2 ( 2SC I 81 SGR )
ON , placing its
collector a t a l o w
level, thus preventing the gate
circuit from
activating the relay driver
Q607 .
The
collector o f Q 6 0 2 i s
connected through
R608
to
the
b ase o f Q 6 0 3 ( 2SAS 64A )
which shorts the
supply voltage for c 6 2
l ;
thus,
c 6 2 1
i s fully charged
w h e n the speaker
output disappears, turning the
gate into the transm i t m o d e
immediately with the
appearance of mi crophone input.
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..
<O
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06 1 2
R65 1 1 80
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0
0
<O
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