Chapter 1 – Introduction
1-2
PCI Local Bus Interface
The PIIX device provides an accelerated PCI-to-ISA interface that includes a high-
performance enhanced IDE controller, PCI and ISA master/slave interfaces, enhanced
DMA functions, and plug-and-play port for on-board devices. The PIIX also provides
many common I/O functions found in ISA-based PC systems, including a seven-channel
DMA controller, two 82C59 interrupt controllers, an 8254 timer/counter, and control
logic for NMI generation.
Video Controller
The PCI bus video controller features a 64-bit graphics engine, with 24-bit RAMDAC
for true color support. Resolutions up to 1024 x 768 with 256 colors are supported. It
also incorporates the latest Green PC monitor plug-and-play features for power savings.
The video controller also offers hardware-assisted video playback for Indeo
™
, Cinepak
™
,
and MPEG-1. Refer to Appendix C for information on Super VGA modes supported.
Fast IDE controller
The enhanced IDE controller supports programmed I/O (PIO) and bus mastering DMA
with transfer rates to 22 Mbytes/second. The controller also contains an 8 x 32-bit buffer
for bus master IDE PCI burst transfers, and will support up to two IDE devices.
Caution
The IDE controller supports enhanced PIO modes, which reduce the
cycle times for 16-bit data transfers to the hard drive. Check with your
drive manual to see if the drive you are using supports these modes. The
higher the PIO mode, the shorter the cycle time. As the IDE cable length
increases, this reduced cycle time can lead to erratic operation. As a
result, it is in your best interest to keep the IDE cable as short as
possible.
The PIO modes are selected in the BIOS setup (refer to Chapter 3). The
Autoconfig will attempt to classify the drive connected if the drive
supports the auto ID command. If you experience problems, change the
PIO to standard.
VMEbus Interface
The XVME-655 uses the PCI local bus to interface to the VMEbus. The VMEbus
interface supports full DMA to/from the VMEbus, integral FIFOs for posted writes,
block mode transfers, and read-modify-write operations. The interface contains four
master and four slave images that can be programmed in a variety of modes to allow the
VMEbus to be mapped into the XVME-655 local memory. This makes it easy to
configure VMEbus resources in protected and real-mode programs.
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