Chapter 4 – Programming
4-5
PCI slave image. The chipset will not give up the PCI bus when there are
posted writes to the VMEbus. This condition causes a deadlock. The
MAST_CTL register contains VOWN and VOWN_ACK, which you
can use to obtain the VMEbus.
Caution
PCI slave images mapped to a system DRAM area will access the system
DRAM, not the PCI slave image. Also, the Universe configuration
register has a higher priority than the PCI slave images. As a result, if
the PCI slave image and the Universe configuration registers are mapped
into the same memory area, the configuration registers will take
precedence.
VMEbus Slave Interface
The XVME-655 can be a VMEbus slave by accessing a VMEbus slave image or by the
DMA channel initiating a transaction. There are four PCI slave images. The first slave
image has a 4 Kbyte resolution; the others have a 64 Kbyte resolution. The slave can
respond to A16, A24, A32 VMEbus cycles for each VMEbus slave image.
The address mode and type are programmed on a VMEbus slave image basis. The VME-
bus memory address location for the VMEbus slave cycle is specified by the Base and
Bound address. The PCI address is calculated by adding the Base address to the
Translation offset address.
The XVME-655 DRAM memory is based on the PC/AT architecture and is not
contiguous. The VMEbus slave images may be set up to allow this DRAM to appear as
one contiguous block.
The first VMEbus slave image must have the Base and Bound register set to 640 Kbytes.
For example:
VMEbus Slave Image 0 BS= 0000000h BD= A0000h TO = 0000000h
The second VMEbus slave image must have the Base register set to be contiguous with
the Bound register from the first VMEbus Slave image. The Bound register is limited by
the total XVME-655 DRAM. The Translation Offset register is offset by 384 Kbytes,
which is equivalent to the A0000h-FFFFFh range on the XVME-655 board.
For example:
VMEbus Slave Image 1 BS=A0000h
BD= 400000h TO = 060000h
Mapping defined by the PC/AT architecture can be overcome if the VMEbus Slave
image window is always configured with a 1 Mbyte Translation Offset. From a user and
software standpoint, this is desirable because the interrupt vector table, system
parameters, and communication buffers (keyboard) are placed in low DRAM. This
provides more system protection.
Caution
When setting up slave images, the address and other parameters should
be set first. Only after the VMEbus slave image is set up correctly
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