16
VC7203 GTX Transceiver Characterization Board
UG957 (v1.0) October 10, 2012
Chapter 1:
VC7203 Board Features and Operation
The JTAG chain of the board is illustrated in
. By default only the Virtex-7 FPGA
and the System ACE SD controller are part of the chain (J1 jumper OFF). Installing the J1
jumper adds the FMC interfaces as well.
X-Ref Target - Figure 1-7
Figure 1-7:
JTAG Chain
UG957_c1_07_100712
FMC1_PR
S
NT_M2C_L
FMC2_PR
S
NT_M2C_L
FMC1 HPC
Connector
TDI
TDO
JA2
FMC2 HPC
Connector
TDI
TDO
JA
3
U7
Virtex-7
FPGA
TDI
TDO
U1
U8
Digilent
U
S
B-JTAG
Mod
u
le
TDI
TDO
S
y
s
tem Ace
S
D
Controller
TDI
TDO
U
3
2
CFGTDO
CFGTDI
U17
U12
FMC_JTAG_EN_B
U19
3
.
3
V
2.5V
UTIL_
3
V
3
10.0 K
J1
FMC
3
_PR
S
NT_M2C_L
FMC
3
HPC
Connector
TDI
TDO
JA4
U17
FMC_JTAG_EN_B