VC7203 GTX Transceiver Characterization Board
53
UG957 (v1.0) October 10, 2012
VC7203 Board UCF Listing
NET FMC3_LA21_P LOC = AM18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA21_N LOC = AM17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA22_P LOC = AK19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA22_N LOC = AK18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA23_P LOC = AM16 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA23_N LOC = AN16 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA24_P LOC = AJ18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA24_N LOC = AJ17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA25_P LOC = AP18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA25_N LOC = AP17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA26_P LOC = AP20 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA26_N LOC = AR19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA27_P LOC = AN19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA27_N LOC = AN18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA28_P LOC = AR18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA28_N LOC = AR17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA18_CC_P LOC = AU18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA18_CC_N LOC = AV18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA17_CC_P LOC = AT17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA17_CC_N LOC = AU17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_CLK0_M2C_P LOC = AY18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_CLK0_M2C_N LOC = AY17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_CLK1_M2C_P LOC = AW18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_CLK1_M2C_N LOC = AW17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA29_P LOC = AU19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA29_N LOC = AV19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA30_P LOC = AT20 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA30_N LOC = AT19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA31_P LOC = AV16 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA31_N LOC = AW16 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA32_P LOC = AT16 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA32_N LOC = AU16 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA33_P LOC = BB19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA33_N LOC = BB18 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA06_P LOC = AV20 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA06_N LOC = AW20 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA07_P LOC = BA17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA07_N LOC = BB17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA08_P LOC = AY20 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA08_N LOC = BA20 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA09_P LOC = BA16 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA09_N LOC = BB16 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA10_P LOC = AY19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_HA10_N LOC = BA19 | IOSTANDARD=LVCMOS18; # Bank 32
NET IO_25_VRP_32 LOC = AP16 | IOSTANDARD=LVCMOS18; # Bank 32
NET IO_0_VRN_33 LOC = AL24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L1P_T0_33 LOC = AJ23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L1N_T0_33 LOC = AK23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L2P_T0_33 LOC = AK20 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L2N_T0_33 LOC = AL20 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L3P_T0_DQS_33 LOC = AJ22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L3N_T0_DQS_33 LOC = AK22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L4P_T0_33 LOC = AL21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L4N_T0_33 LOC = AM21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L5P_T0_33 LOC = AJ21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L5N_T0_33 LOC = AJ20 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L6P_T0_33 LOC = AL22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L6N_T0_VREF_33 LOC = AM22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L7P_T1_33 LOC = AM24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L7N_T1_33 LOC = AN24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L8P_T1_33 LOC = AM23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L8N_T1_33 LOC = AN23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L9P_T1_DQS_33 LOC = AP23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L9N_T1_DQS_33 LOC = AP22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L10P_T1_33 LOC = AN21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L10N_T1_33 LOC = AP21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L11P_T1_SRCC_33 LOC = AR23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L11N_T1_SRCC_33 LOC = AR22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L12P_T1_MRCC_33 LOC = AT22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L12N_T1_MRCC_33 LOC = AU22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L13P_T2_MRCC_33 LOC = AU23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L13N_T2_MRCC_33 LOC = AV23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L14P_T2_SRCC_33 LOC = AW23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L14N_T2_SRCC_33 LOC = AW22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L15P_T2_DQS_33 LOC = AT21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L15N_T2_DQS_33 LOC = AU21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L16P_T2_33 LOC = AR24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L16N_T2_33 LOC = AT24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L17P_T2_33 LOC = AV21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L17N_T2_33 LOC = AW21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L18P_T2_33 LOC = AU24 | IOSTANDARD=LVCMOS18; # Bank 33
