ML623 Board User Guide
www.xilinx.com
5
UG724 (v1.1) September 15, 2010
Preface
About This Guide
This document describes the basic setup, features, and operation of the ML623
Virtex-6 FPGA GTX transceiver characterization board. The ML623 board provides the
hardware environment for characterizing and evaluating the GTX transceivers available
on the Virtex®-6 XC6VLX240T-2FFG1156C FPGA.
Guide Contents
This user guide contains the following chapters and appendices:
•
Chapter 1, ML623 Board Features and Operation
, describes the components, features,
and operation of the ML623 Virtex-6 FPGA GTX transceiver characterization board.
•
Appendix A, Default Jumper Positions
, lists the jumpers that must be installed on the
board for proper operation.
•
Appendix B, VITA 57.1 FMC HPC Connector Pinout
, provides a pinout reference for
the FPGA mezzanine card (FMC) connector.
•
Appendix C, ML623 Master UCF Listing
, provides a listing of the ML623 master user
constraints file (UCF).
•
Appendix D, References
, provides a list of references and links to related
documentation.
To find additional documentation, see the Xilinx website at:
http://www.xilinx.com/support/documentation/index.htm
.
To search the Answer Database of silicon, software, and IP questions and answers, or to
create a technical support WebCase, see the Xilinx website at:
http://www.xilinx.com/support
.
Conventions
This document uses the following conventions. An example illustrates each convention.
Typographical
The following typographical conventions are used in this document:
