Chapter 5
Design Flow Steps
This section describes customizing and generating the core, constraining the core, and the
simulation, synthesis and implementation steps that are specific to this IP core. More detailed
information about the standard Vivado
®
design flows and the IP integrator can be found in the
following Vivado Design Suite user guides:
• Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (
UG994
)
• Vivado Design Suite User Guide: Designing with IP (
UG896
)
• Vivado Design Suite User Guide: Getting Started (
UG910
)
• Vivado Design Suite User Guide: Logic Simulation (
UG900
)
Customizing and Generating the Core
The I2S Transmitter and Receiver can be found under the following Audio Connectivity and
Processing Vivado
®
IP catalog.
To access the I2S IPs, do the following:
1. Open an existing project or create a new project using the Vivado design tools.
2. Open the IP catalog and navigate to the taxonomies.
3. Double-click on either I2S Receiver or Transmitter to bring up the customize IP window.
For details, see the Vivado Design Suite User Guide: Designing with IP (
UG896
) and the Vivado
Design Suite User Guide: Getting Started (
UG910
).
Note
:
Figures in this chapter are illustrations of the Vivado Integrated Design Environment (IDE). This
layout might vary from the current version.
For more information on generating the core in the Vivado IP integrator, see the Vivado Design
Suite User Guide: Designing IP Subsystems using IP Integrator (
UG994
) for detailed information.
Vivado IDE might auto-compute certain configuration values when validating or generating the
design, as noted in this section. You can view the parameter value after successful completion of
the validate_bd_design command.
PG308 (v1.0) April 4, 2018
www.xilinx.com
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I2S Transmitter and I2S Receiver
27
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