Counter Module 750-404
7
:$*2
⇓
,
2
⇓
6<67(0
Organization of the in- and output data:
The counter begins processing with pulses at the CLOCK input for a special time span.
The time span is predefined as 10 s. The state of the counter is stored in the processs
image until the next period. After the recording the counting starts again at 0.
The activation of the counting and the synchronisation with the SPS is made by a
handshake in the control and status byte.
The end of thre counting period and thus the new process data is signaled by a toggel bit
in the status byte.
The control byte has the following bits:
Control Byte
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
start of the
periodic
counting
0
Output value at
output O2
Output value at
output O1
0
0
The status byte has the following bits:
Status Byte
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
counting
started
0
actual signal at
O2
actual signal
at O1
actual signal at
input U/D
Toggelbit for
end of the
record