Viglen CX135, Руководство пользователя, Страница: 58 / 93

Viglen CX135 User Guide – Version 1.0
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Ratio CMOS Setting
This option allows the user to set the ratio between the CPU Core Clock and the
FSB Frequency. (*Note: if an invalid ratio is entered, AMIBIOS will restore the setting
to the previous state.)
Max CPUID Value Limit
This feature allows the user to set the maximum CPU ID value. Enable this function
to boot legacy OS that cannot support processors with extended CPUID functions.
The options are Enabled, and
Disabled .
Hardware Prefetcher
This feature allows the user to enable the Hardware Prefetcher function. If
"
Disabled ", the CPU will prefetch data at 64-bit per cache line. If "Enabled", it will
fetch data at 128-bit per cache line.
Adjacent Cache Line Prefetch
This feature allows the user to enable the function of Adjacent Cache Line Prefetch.
The options are Enabled and
Disabled .
Hyper-Threading Function
This setting allows you to Enable or Disable the function of hyper-threading.
Enabling hyper-threading results in increased CPU performance.
Intel® Speed Step™ Tech
This setting allows you to enable the function of Intel Speedstep Tech to set the CPU
speeds. The options are: Maximum Speed, Minimum speed, Automatic
(controlled
by OS) , and Disabled.
CPU Force PR#
If Enabled, the FORCEP# will function as an input pin. If disabled, the state of
FORCEPR# will be ignored by the CPU. The options are:
Enabled and Disabled.
VRM Protection Temperature
This setting allows you to set the VRM Protection Temperature, These options are:
72
°
C , 88
°
C , 98
°
C , and 108
°
C .
Select TM2 VID
This setting allows you to set the TM2 VID value. Enter a number from 14 to 35 to
select the desired voltage value (from 1.000V to 1.2625V.)