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6
Plasma TV Service Manual 05/01/2006
- Including 100 kHz (2.5V) and 400 kHz (5V) modes
• Self-timed ERASE and WRITE cycles
• Power on/off data protection circuitry
• Endurance:
- 10,000,000 Erase/Write cycles
guaranteed for High Endurance Block
- 1,000,000 E/W cycles guaranteed for
Standard Endurance Block
• 8 byte page, or byte modes available
• 1 page x 8 line input cache (64 bytes) for fast write
loads
• Schmitt trigger, filtered inputs for noise suppression
• Output slope control to eliminate ground bounce
• 2 ms typical write cycle time, byte or page
• Factory programming (QTP) available
• Up to 8 devices may be connected to the same
bus for up to 256K bits total memory
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP/SOIC packages
• Temperature ranges
12.2.3. Pin Connections
TABLE 1-1: PIN FUNCTION TABLE
Name Function
A0,A1,A2 User Configurable Chip Selects
Vss Ground
SDA Serial Address/Data I/O
SCL Serial Clock
Vcc +2.5V to 6.0V Power Supply
NC
No Internal Connection
12.3. TDA9886
12.3.1. General Description
The TDA9886 is an alignment-free single standard (without positive modulation) vision and sound IF signal
PLL.
12.3.2. Features
•
5 V supply voltage
•
Gain controlled wide-band Vision Intermediate Frequency (VIF) amplifier (AC-coupled)