AC70 VC CONTROL FREQUENCY INVERTER MANUAL
APPENDIX
138
Data high-order
13H
Data low-order
88H
CRC CHK low-order
EDH
CRC CHK high-order
5DH
END
Transmission time of 3.5 bytes
RTU Slave machine responding information (normal)
START
Transmission time of 3.5 bytes
Slave machine address
01H
Order code
08H
Detecting code high-order
00H
Detecting code low-order
00H
Data high-order
13H
Data low-order
88H
CRC CHK low-order
EDH
CRC CHK high-order
5DH
END
Transmission time of 3.5 bytes
RTU Slave machine responding information (abnormal)
START
Transmission time of 3.5 bytes
slave machine address
01H
Order code
88H
Error code
03H
CRC CHK low-order
06H
CRC CHK high-order
01H
END
Transmission time of 3.5 bytes
5.2.4 Communication frame error check mode
The standard ModBus serial network adopts two kinds of error check mode: odd/even checking which is used to check
every character and CRC detecting which is used to check one frame of data.
1, Odd-even checking
The users can configure the controller with odd or even checking, or no checking, what will determine how to set
odd/even checking in every character.
If odd /even checking have been allocated, "1" bit will be accounted to the bit number of each character (7 bits in ASCII
mode, 8 bits in RTU.. For example, the RTU character frame contains the following 8 bits: 1 1 0 0 0 1 0 1
There are 4 bits with number"1". If using the even checking, odd/even checking bit of the frame will be 0, then there are
still 4 bits with number"1". If using odd checking, odd/even checking bit of the frame will be 1. Then there are 5 bits with
number"1".
If odd/even checking has not been allocated, there will be no checking bit during the transmission, and no checking
detection. One additional stop bit will be filled into the character frame in transmission.
2, CRC-16(cycle redundant check)
While the RTU frame form in use; the frame has included the frame error detecting domain which calculates base on
the CRC method. The CRC domain checks the content of the entire frame. The CRC domain is two bytes, containing
binary values of 16 bits. It is added to the frame after calculated by the transmission equipment. The receiving
equipment calculates CRC who receives frame again, and compares it with the value of the receiving CRC domain. If
both CRC value are not equal, it means the transmission has mistake. CRC is firstly stored in 0xFFFF. Then a program
is used to process the continuous 6 or above bytes in the frame and the value of current registers. Only 8Bit in every
character is valid to CRC. Start bit
、
stop bit and parity check bit are invalid.
In the process of CRC coming out, each 8 characters independently XOR with register content. The result moves to
minimum effective digit. LSB is extracted to be detected. If LSB is 1, the register is independently XOR with the pre-set
value. If LSB is 0, it is no XOR. This process needs to repeat 8 times. After the last bit (the eighth bit. is accomplished.
Next 8 bits bytes will independently XOR with register content. All the final bytes in the frame are CRC value after
processed.
This CRC operation method adopts the international standard CRC checking rule. Users can consult the relevant
standard CRC operation while editing the CRC algorithm to compile out the real CRC calculation program as required.
Now here provide the user a simple CRC operation function (with C language programming:
unsigned int crc_chk_value(unsigned char *data_value,unsigned char length)
{