Vaisala CARBOCAP GMP231, Руководство пользователя, Страница: 53 / 92

The full 7-bit default address is “0001001” (09
hex
). In I
2
C communication, the address should
be provided by the master in the standard way after the I
2
C start condition, with the read/
write bit as the least significant bit (LSB).
Table 45 GMP231 I
2
C Address
0 0 0 1 0 0 1 R/W
Device type Sub-address Read/write bit
(LSB)
The I
2
C implementation of the GMP231 also includes the address inside the message frame.
The purpose of this is to make the I
2
C implementation easier, since the I
2
C address can be lost
by the I
2
C hardware. This address is provided without the read/write bit, with zero as the MSB.
Table 46 GMP231 Device Address
0 0 0 0 1 0 0 1
MSB Device type Sub-address
Make sure that there are no addressing conflicts if other I
2
C devices are put on the
same bus. The GMP231 address can be changed.
More information
‣ Register table (page 64)
5.1.4 Timing
The minimum time delay that the master must wait between the invoke and response
messages depends on the operation. If the operation includes a write to the non-volatile
memory, it takes more time than other operations.
Table 47 Timing
Operation Minimum Delay
Normal delay between invoke and response 10 ms
Delay when write to non-volatile memory 300 ms
5.1.5 Status byte
The status byte gives the master device information about the slave device’s state, and
information about the communication status with the ACK/NACK bit.
Chapter 5 – I2C interface
51