TMCM-035 Manual (V2.09 / February 27
th
, 2009)
15/18
Copyright © 2007-2009, TRINAMIC Motion Control GmbH & Co. KG
4.6.3
64 Microstep resolution with SPI interface since TMCM-035 V2.0
To get full 64 microsteps using the TMC428 with a user built electronics, please refer to the schematic
example in [TMC239] or [TMC249] and [TMC236/239/246/249 FAQ] (Extending the microstep resolution).
Please remark, that the
lower two bits are inverted
, and the
values from 0 to 3 give a zero current
.
This effectively results in a 60 level current resolution. A suitable microstep table is printed below.
The effect of this modified DAC behaviour is, that the TMC428 ramp-phase-dependent current scaling
function does not lead to a good result and should not be used! This could be improved by inverting
the additional DAC-Bits. Please be aware, that the module in 64 microstep mode can not be included
in SPI busses with multiple /CS lines.
For best microstep performance run the motors with mixed decay switched on continuously and
36kHz chopper.
To program the TMCM-035 for 64 microstep mode the pins 24 and 27 are used (refer to 4.6.1). It is
important to load the proper wave table as well as the proper SPI configuration. Both are available
on the TRINAMIC technical library. The following table depicts the SPI bit ordering. The bits are to be
shifted into the SPI chain from left (19) to right (0). The function of the bits is described in the
TMC239 / TMC249 manual and FAQ document.
Standard
function
Bit
12
TMC239 control word
Additional 8 bits in 64 microstep mode
CB5
(MSB)
11
CB4
10
CB3
9
CB2
8
PHB
13
MXB
18
CA5
(MSB)
17
CA4
16
CA3
15
CA2
14
PHB
19
MXA
7
/CB1
6
/CB0
5
/CA1
4
/CA0
3
-
2
-
1
-
0
-
Figure 4.6: SPI word assignment in 64 microstep mode
Required TMC428 driver chain configuration for each TMCM-035 in 64 microstep mode:
0x11,0x05,0x04,0x03,0x02,0x06,0x11,0x0d,0x0c,0x0b,0x0a,0x0e,0x09,0x08,0x01,0x00,
0x10,0x10,0x10,0x30
// 4 unused bytes, last plus next motor bit
The suitable microstep table for 32 and 64 microstep with inverted LSBs (1/4 wave, like in TMC428):
0x00,0x07,0x05,0x04,0x0a,0x09,0x0f,0x0e,0x0c,0x13,0x11,0x10,0x17,0x15,0x14,0x1a,
0x19,0x18,0x1e,0x1d,0x1c,0x22,0x21,0x20,0x27,0x25,0x24,0x2b,0x2a,0x29,0x28,0x2f,
0x2e,0x2d,0x2c,0x33,0x32,0x31,0x30,0x37,0x36,0x35,0x35,0x34,0x3b,0x3a,0x3a,0x39,
0x39,0x38,0x38,0x3f,0x3f,0x3e,0x3e,0x3d,0x3d,0x3d,0x3d,0x3d,0x3c,0x3c,0x3c,0x3c
Since the wave table is modified (lower two bits, bit 0 and bit 1, are inverted), the current scaling
function of the TMC428 (IS_AGTAT, IS_ALEAT, IS_V0) should be switched off, i.e. these registers should
be set to zero (full current).
Hint for operation with TMC428 based controllers: The needs to read back the TMC249 bits for
operation of the StallGuard or for driver diagnostics. While the TMC428 can control driver chains with
up to 64 bits, it can read back a total of 48 bits only. Thus, when cascading three TMCM-035 in one
TMC428 driver chain and all modules are set to 64 microstep mode, the first 12 bits sent back from
the 60 bit long driver chain to the TMC428 can not be read back. These are all bits from the last
TMC249 in the chain, including its StallGuard bits. Thus, you should attach only two TMCM-035 in 64
microstep mode to a TMC428 based module. This brings also an advantage for the reachable motor
velocity. If you need all StallGuard bits in a three driver chain, switch at least two modules in the
chain to 16 microstep mode.
