Trenz Electronic TE0790, Руководство пользователя

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TE0790 TRM Revision: v.37
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https://wiki.trenz-electronic.de/display/PD/CPLD+-+XMOD+Standard
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Figure 3: J2 pin header signal assignment
The signals of the FTDI FT2232H chip are not directly connected to the pin header J2 but routed to the System
Controller CPLD of the adapter board, which controls and by-passes the signals to the pin header J2.
Therefore, different signal assignments are made on the pin header J2 depending on the SC CPLD firmware:
Signal assignment on TE0790 CPLD - XMOD Standard:
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FTDI Signal Pull up/
down J2 Pin
Name
J2 Pin
Name
Pull up/
down Signal FTDI
GND - 1* - GND
ADBUS
0 TCK (out
put from
adapter)
C A up UART
RXD
(input to
adapter) BDBUS
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