Introduction to the P5000HX Series CPU
8
Model P5000HX Series CPU User’s Manual
1.2
A PCI Discussion
Overview
The P5000HX is designed to be used with either an ISA or
a PCI backplane. This section discusses the PCI Local Bus.
The PCI Local Bus
The PCI Local Bus is a high-performance, 133 MB/sec,
32-bit bus with multiplexed address and data lines. It is
intended for use as an interconnect mechanism between
highly-integrated peripheral controller components, add-
in boards, and processor/memory systems.
Why the PCI Local
Bus?
Graphics-oriented operating systems such as Windows
and OS/2 have created a data bottleneck between the pro-
cessor and its display peripherals in standard PC I/O
architectures. Moving peripheral functions with high-
bandwidth requirements closer to the system’s processor
bus can eliminate this bottleneck.
Substantial performance gains are seen with graphical
user interfaces (GUI’s) and other high-bandwidth func-
tions (i.e., full-motion video, SCSI, LANs, etc.) when a
“local bus” design is used.
The PCI Bridge
The processor/cache/memory subsystem in a PCI system is
connected to PCI through a “PCI Bridge.” This bridge pro-
vides a low-latency path through which the processor may
directly access PCI devices mapped anywhere in the mem-
ory or I/O address spaces. It also provides a high-band-
width path, allowing PCI masters direct access to main
memory.
PICMG
Texas Microsystems is a founding member of the PICMG
(PCI Industrial Computer Manufacturers Group), founded
to develop standards for PCI-based passive backplane sys-
tems. The P5000HX is fully PICMG-compliant.
