Texas Instruments TRF7970A BoosterPack, Руководство пользователя

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TRF7970A
SLOS743L – AUGUST 2011 – REVISED MARCH 2017 www.ti.com
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Detailed Description
Copyright © 2011–2017, Texas Instruments Incorporated
(1) X = Don't care
6.3.3 Power Modes
The chip has several power states, which are controlled by two input pins (EN and EN2) and several bits
in the chip status control register (0x00) (see
Table 6-3 and Table 6-4 ).
Table 6-3. 3.3-V Operation Power Modes
(1)
MODE EN2 EN
CHIP
STATUS
CONTROL
REGISTER
(0x00)
REGULATOR
CONTROL
REGISTER
(0x0B)
TRANSMITTER RECEIVER
SYS_CLK
(13.56 MHz)
SYS_CLK
(60 kHz)
V
DD_X
TYPICAL
CURRENT
(mA)
TYPICAL
POWER
OUT (dBm)
Power down 0 0 XX XX OFF OFF OFF OFF OFF <0.001 -
Sleep mode 1 0 XX XX OFF OFF OFF ON ON 0.120 -
Standby mode at +3.3 VDC X 1 80 00 OFF OFF ON X ON 2 -
Mode 1 at +3.3 VDC X 1 00 00 OFF OFF ON X ON 3 -
Mode 2 at +3.3 VDC X 1 02 00 OFF ON ON X ON 9 -
Mode 3 (half power) at
+3.3 VDC
X 1 30 07 ON ON ON X ON 53 14.5
Mode 4 (full power) at
+3.3 VDC
X 1 20 07 ON ON ON X ON 67 17
(1) X = Don't care
Table 6-4. 5-V Operation Power Modes
(1)
MODE EN2 EN
CHIP
STATUS
CONTROL
REGISTER
(0x00)
REGULATOR
CONTROL
REGISTER
(0x0B)
TRANSMITTER RECEIVER
SYS_CLK
(13.56 MHz)
SYS_CLK
(60 kHz)
V
DD_X
TYPICAL
CURRENT
(mA)
TYPICAL
POWER
OUT (dBm)
Power down 0 0 XX XX OFF OFF OFF OFF OFF <0.001 -
Sleep mode 1 0 XX XX OFF OFF OFF ON ON 0.120 -
Standby mode at +5 VDC X 1 81 07 OFF OFF ON X ON 3 -
Mode 1 at +5 VDC X 1 01 07 OFF OFF ON X ON 5 -
Mode 2 at +5 VDC X 1 03 07 OFF ON ON X ON 10.5 -
Mode 3 (half power) at
+5 VDC
X 1 31 07 ON ON ON X ON 70 20
Mode 4 (full power) at
+5 VDC
X 1 21 07 ON ON ON X ON 130 23
Table 6-3 and Table 6-4 show the configuration for the different power modes when using a 3.3-V or 5-V
system supply, respectively. The main reader enable signal is pin EN. When EN is set high, all of the
reader regulators are enabled, the 13.56-MHz oscillator is running and the SYS_CLK (output clock for
external microcontroller) is also available.
The input pin EN2 has two functions:
• A direct connection from EN2 to V
IN
to ensure the availability of the regulated supply V
DD_X
and an
auxiliary clock signal (60 kHz, SYS_CLK) for an external MCU. This mode (EN = 0, EN2 = 1) is
intended for systems in which the MCU is also being supplied by the reader supply regulator (V
DD_X
)
and the MCU clock is supplied by the SYS_CLK output of the reader. This allows the MCU supply and
clock to be available during sleep mode.
• EN2 enables the start-up of the reader system from complete power down (EN = 0, EN2 = 0). In this
case the EN input is being controlled by the MCU (or other system device) that is without supply
voltage during complete power down (thus unable to control the EN input). A rising edge applied to the
EN2 input (which has an approximately 1-V threshold level) starts the reader supply system and 13.56-
MHz oscillator (identical to condition EN = 1).
When user MCU is controlling EN and EN2, a delay of 1 ms between EN and EN2 must be used. If the
MCU controls only EN, TI recommends connecting EN2 to either V
IN
or GND, depending on the
application MCU requirements for V
DD_X
and SYS_CLK.