Texas Instruments TRF7970A BoosterPack, Руководство пользователя

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Slave
Select
MISO
MOSI
DATA_CLK
Write
Address Byte
Read Data
Byte 1
Read Data
Byte n
Don’t Care
No Data Transitions (All High or Low) No Data Transitions (All High or Low)
B7 B6 B5 B4 B3 B2 B1 B0
B7 B6 B5 B4 B3 B2 B1 B0 B7 B6 B5 B4 B3 B2 B1 B0
b0 MISO
MOSI
DATA_CLK
Write
MOSI Transitions on Data Clock
Rising Edge
MOSI Valid on Data Clock Falling Edge
t
STE,LEAD
b7
t
LO/HI
t
LO/HI
b6…b1 b0
t
SU,SI
t
HD,SI
1/f
UCxCLK
t
STE,DIS
b6...b1
t
VALID,SO
t
STE,LAG
t
HD,SO
Don’t Care
Read
Data Transition is on Data Clock
Rising Edge
MISO Valid on Data Clock Falling Edge
t
SU,SO
b7
No Data Transitions
(All High or Low)
Slave Select
40
TRF7970A
SLOS743L – AUGUST 2011 – REVISED MARCH 2017 www.ti.com
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Detailed Description
Copyright © 2011–2017, Texas Instruments Incorporated
Figure 6-19. SPI With Slave Select Timing Diagram
The read command is sent out on the MOSI pin, MSB first, in the first eight clock cycles. MOSI data
changes on the rising edge, and is validated in the reader on the falling edge, as shown in
Figure 6-19 .
During the write cycle, the serial data out (MISO) is not valid. After the last read command bit (B0) is
validated at the eighth falling edge of SCLK, valid data can be read on the MISO pin at the falling edge of
SCLK. It takes eight clock edges to read out the full byte (MSB first). See
Section 5.4 for electrical
specifications related to Figure 6-19 .
Figure 6-20 and Figure 6-21 show the continuous read operation.
Figure 6-20. Continuous Read Operation Using SPI With Slave Select