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Input Data
4 Input Data
4.1 Branch Metrics Calculations
The branch metrics (BM) are calculated by the DSP and stored in the DSP memory subsystem as 8-bit
signed values. Per symbol interval T, for a rate R = k/n and a constraint length K, there are a total of 2
K-1+k
branches in the trellis. For rate 1/n codes, only 2
n-1
branch metrics need to be computed per symbol period
and passed to the VCP2. Moreover, n soft inputs are required to calculate 1 branch metric.
Assuming BSPK modulated bits (0 → 1, 1 → -1), the branch metrics are calculated as follows:
• Rate 1/2: there are 2 branch metrics per symbol period
– BM
0
(t) = r
0
(t) + r
1
(t)
– BM
1
(t) = r
0
(t) - r
1
(t)
where r(t) is the received codeword at time t (2 symbols, r
0
(t) is the symbol corresponding to the encoder
upper branch, see Figure 1 ).
• Rate 1/3: there are 4 branch metrics per symbol period
– BM
0
(t) = r
0
(t) + r
1
(t) + r
2
(t)
– BM
1
(t) = r
0
(t) + r
1
(t) - r
2
(t)
– BM
2
(t) = r
0
(t) - r
1
(t) + r
2
(t)
– BM
3
(t) = r
0
(t) - r
1
(t) - r
2
(t)
where r(t) is the received codeword (3 symbols, r
0
(t) is the symbol corresponding to the encoder upper
branch, see Figure 1 ).
• Rate 1/4: there are 8 branch metrics per symbol period
– BM
0
(t) = r
0
(t) + r
1
(t) + r
2
(t) + r
3
(t)
– BM
1
(t) = r
0
(t) + r
1
(t) + r
2
(t) - r
3
(t)
– BM
2
(t) = r
0
(t) + r
1
(t) - r
2
(t) + r
3
(t)
– BM
3
(t) = r
0
(t) + r
1
(t) - r
2
(t) - r
3
(t)
– BM
4
(t) = r
0
(t) - r
1
(t) + r
2
(t) + r
3
(t)
– BM
5
(t) = r
0
(t) - r
1
(t) + r
2
(t) - r
3
(t)
– BM
6
(t) = r
0
(t) - r
1
(t) - r
2
(t) + r
3
(t)
– BM
7
(t) = r
0
(t) - r
1
(t) - r
2
(t) - r
3
(t)
where r(t) is the received codeword (4 symbols, r
0
(t) is the symbol corresponding to the encoder upper
branch, see Figure 1 ).
The data must be sent to the VCP2 as described in Table 1 , Table 2 , and Table 3 for rates 1/2, 1/3, and
1/4, respectively (the base address must be double-word aligned).
The branch metrics can be saved in the DSP memory subsystem in either their native format or packed in
words (user implementation). When working in big-endian mode, the VCP2 endian mode register
(VCPEND) indicates if the data is 32-bit word packed or native 8-bit format and the VCP2 will handle the
endianness byte swapping accordingly (see
Section 7 ).
Table 1. Branch Metrics for Rate 1/2
Data
Address (hex) MSB LSB
Base BM
1
(t=T) BM
0
(t=T) BM
1
(t=0) BM
0
(t=0)
Base + 4h BM
1
(t=3T) BM
0
(t=3T) BM
1
(t=2T) BM
0
(t=2T)
Base + 8h ...
11 SPRUE09E – May 2006 – Revised December 2009 TMS320TCI648x/9x Viterbi-Decoder Coprocessor 2
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