
output 2
output 0
output 1
input
z
-1
z
-1
Introduction
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2
Introduction
A convolutional code is generated by passing the information sequence to be transmitted through a linear
finite-state shift register. The VCP2 is able to decode only a subset of those codes known as a single-shift
register, nonrecursive convolutional code (an example is given in
). Important parameters for this
type of codes are:
•
The constraint length K (length of the delay line, the VCP2 supports K values from 5 to 9).
•
The rate R given by R = k/n where k is the number of information bits needed to produce n output bits
also known as codewords (the VCP2 supports 1/2, 1/3, and 1/4 codes with rates).
•
The generator polynomials Gn describe how the outputs are generated from the inputs.
Figure 1. Convolutional Encoder Example Block Diagram
NOTE:
K = 3, R = k/n = 1/3, G
0
= (100)
8
, G
1
= (101)
8
, G
2
= (111)
8
0/000 means input is 0, output0 is
0, output1 is 0, output2 is 0.There are 2
(K-1)
states and 2
k
incoming branches per state.
From the parameters, we can derive a trellis diagram providing a useful representation of the code, but
whose complexity grows exponentially with the constraint length K.
shows the trellis diagram of
the code from
. The fact that there is a limited number of possible transitions from one state to
another makes the code powerful and will be used in the decoding process.
As a maximum-likelihood sequence estimation (MLSE) decoder, the Viterbi decoder identifies the code
sequence with the highest probability of matching the transmitted sequence based on the received
sequence.
The Viterbi algorithm is composed of a metric update and a traceback routine. The metric update performs
a forward recursion in the trellis over a finite number of symbol periods where probabilities are
accumulated (the VCP2 accumulates on 13 bits) for each individual state based on the current input
symbol (branch metric information). The accumulated metric is known as path metrics or state metrics.
Once a path through the trellis is identified, the traceback routine performs a backward recursion in the
trellis and outputs hard decisions or soft decisions.
8
TMS320TCI648x/9x Viterbi-Decoder Coprocessor 2
SPRUE09E – May 2006 – Revised December 2009
Copyright © 2006–2009, Texas Instruments Incorporated