End-Of-Service Determination
20
SLUUBE8 – September 2018
Copyright © 2018, Texas Instruments Incorporated
General Description
1 = Enabled
RSDLI = Enables
EOSStatus()[RSDLI]
0 = Disabled (default)
1 = Enabled
RCELLR = Enables
EOSStatus()[RCELLR]
0 = Disabled (default)
1 = Enabled
IRRCOMP = Enables
EOSStatus()[IRRCOMP]
0 = Disabled (default)
1 = Enabled
IRCOMP = Enables
EOSStatus()[IRCOMP]
0 = Disabled (default)
1 = Enabled
1.3.1.6
Alert_5 Config
This register matches the EOS Safety Status register active bits. Bits 7:4 in the Alert_5 Config register
match the EOS Safety Status register's high byte, Bits 3:0. Bits 3:0 in the Alert_5 Config register match
the EOS Safety Status register's low byte, Bits 3:0.
Table 1-9. Alert_5 Config Register Bit Definitions
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RSVD
RSDLWARN
RSDWARN
DRDWARN
RSVD
RSDL
ALERT
RSDALERT
DRDALERT
Default
0
0
0
0
0
0
0
0
0x00
RSVD = Reserved
RSDLWARN = Enables
EOSSafetyStatus()[RSDLWARN]
0 = Disabled (default)
1 = Enabled
RSDWARN = Enables
EOSSafetyStatus()[RSDWARN]
0 = Disabled (default)
1 = Enabled
DRDWARN = Enables
EOSSafetyStatus()[DRDWARN]
0 = Disabled (default)
1 = Enabled
RSVD = Reserved
RSDLALERT = Enables
EOSSafetyStatus()[RSDLALERT]
0 = Disabled (default)
1 = Enabled
RSDALERT = Enables
EOSSafetyStatus()[RSDALERT]
0 = Disabled (default)
1 = Enabled
DRDALERT = Enables
EOSLearnStatus()[DRDALERT]
0 = Disabled (default)
1 = Enabled
1.3.1.7
Alert_6 Config
This register matches two bits from the Operation Status low byte.