8.6 Timing Requirements
MIN
TYP
MAX
UNIT
POWER-PATH MANAGEMENT AND INPUT CURRENT LIMIT
t
DGL_SC
Deglitch Time, PMID or SW Short Circuit
during Discharge Mode
250
µs
t
REC_SC
Recovery time, OUT Short Circuit during
Discharge Mode
2
s
BATTERY CHARGER
t
DGL_SHORT
Deglitch time transition from ISET short to
I
(CHARGE)
disable
Clear fault by disconnecting VIN
1
ms
BATTERY CHARGING TIMERS
t
MAXCHG
Charge safety timer
Programmable range
2
540
min
t
PRECHG
Precharge safety timer
0.1 x t
MAXCHG
SYS OUTPUT
t
ONMIN
Minimum ON time
V
IN
= 3.6 V, V
OUT
= 2 V, I
OUT
= 0 mA
225
ns
t
OFFMIN
Minimum OFF time
V
IN
= 4.2 V
50
ns
t
START_SW
SW start up time
V
IN
= 5 V, from write on EN_SW_OUT
until output starts to rise
5
25
ms
t
START_SYS
SYS output time to start switching
From insertion of BAT > V
(BUVLO)
or
V
IN
> V
(UVLO)
350
µs
t
SOFTSTART
Softstart time with reduced current limit
400
1200
µs
LS/LDO OUTPUT
t
ON_LDO
Turn ON time
100-mA load
500
µs
t
OFF_LDO
Turn OFF time
100-mA load
5
µs
PUSHBUTTON TIMER
t
WAKE1
Push button timer wake 1
Programmable Range for wake1
function
0.08
1
s
t
WAKE2
Push button timer wake 2
Programmable Range for wake2
function
1
2
s
t
RESET
Push button timer reset
Programmable Range for reset
function
5
15
s
t
RESET_D
Reset pulse duration
400
ms
t
DD
Detection delay (from MR, input to
RESET)
For 0s condition
6
µs
BATTERY-PACK NTC MONITOR
t
DGL(TS)
Deglitch time on TS change
Applies to V
(HOT)
, V
(WARM)
, V
(COOL
),
and V
(COLD)
50
ms
I2C INTERFACE
t
WATCHDOG
I
2
C interface reset timer for host
50
s
t
I2CRESET
I
2
C interface inactive reset timer
700
ms
t
HIZ_ACTIVEBAT
Transition time required to enable the I
2
C
interface from HiZ to Active BAT
1
ms
INPUT PIN
t
/CD_DGL
Deglitch for CD
CD rising/falling
100
µs
t
QUIET
Input quiet time for Ship Mode transition
1
ms
SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021
12
Copyright © 2022 Texas Instruments Incorporated
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