Texas Instruments BQ25120F3A, Руководство пользователя

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8.5 Electrical Characteristics (continued)
Circuit of Figure 8-1 , V
(UVLO)
< V
IN
< V
(OVP)
and V
IN
> V
(BAT)
+ V
(SLP)
, T
J
= –40°C to 85°C and T
J
= 25°C for typical values
(unless otherwise noted)
PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT
I
(CHARGE)
Fast Charge Current
Range
V
(BATUVLO)
< V
(BAT)
< V
(BATREG)
5 300 mA
Fast Charge Current
using ISET K
(ISET)
/
R
(ISET)
A
Fast Charge Current
Accuracy
–5% 5%
K
(ISET)
Fast Charge Current
Factor
5 mA > I
(CHARGE)
> 300 mA 190 200 210 AΩ
I
(TERM)
Termination charge
current
Termination current programmable range over I
2
C 0.5 37 mA
Termination Current
using IPRETERM
I
(CHARGE)
< 300 mA, R
(ITERM)
= 15 kΩ 5 % of I
SET
I
(CHARGE)
< 300 mA, R
(ITERM)
= 4.99 kΩ 10 % of I
SET
I
(CHARGE)
< 300 mA, R
(ITERM)
= 1.65 kΩ 15 % of I
SET
I
(CHARGE)
< 300 mA, R
(ITERM)
= 549 Ω 20 % of I
SET
Accuracy I
(TERM
) > 4 mA –10% 10%
t
DGL(TERM)
TERM deglitch time Both rising and falling, 2-mV over-drive, t
RISE
, t
FALL
= 100 ns 64 ms
I
(PRE_CHARGE)
Pre-charge current Pre-charge current programmable range over I
2
C 0.5 37 mA
Pre-charge Current using
I
PRETERM
I
(TERM)
A
Accuracy –10% 10%
V
(RCH)
Recharge threshold
voltage
Below V
(BATREG)
100 120 140 mV
t
DGL(RCHG)
Recharge threshold
deglitch time
t
FALL
= 100 ns typ, V
(RCH)
falling 32 ms
SYS OUTPUT
R
DS(ON_HS)
PMID = 3.6 V, I
(SYS)
= 150 mA 675 850 mΩ
R
DS(ON_LS)
PMID = 3.6 V, I
(SYS)
= 150 mA 300 475 mΩ
R
DS(CH_SYS)
MOSFET on-resistance
for SYS discharge
V
I
N = 3.6 V, I
OUT
= –10 mA into V
OUT
pin 22 40 Ω
I
(LIMF)
SW Current limit HS 2.2 V < V
(PMID)
< 5.5 V 450 600 675 mA
SW Current limit LS 2.2 V < V
(PMID)
< 5.5 V 450 700 850 mA
I
(LIM_SS)
PMOS switch current limit
during softstart
Current limit is reduced during softstart 80 130 200 mA
V
SYS
SYS Output Voltage
Range
Programmable range, 100 mV Steps 1.1 3.3 V
Output Voltage Accuracy V
IN
= 5 V, PFM mode, I
OUT
= 10 mA, V
(SYS)
= 1.8 V –2.5% 0 2.5%
DC Output Voltage Load
Regulation in PWM mode
V
OUT
= 2 V, over load range 0.01 %/mA
DC Output Voltage Line
Regulation in PWM mode
V
OUT
= 2 V, I
OUT
= 100 mA, over V
IN
range 0.01 %/V
LS/LDO OUTPUT
V
IN(LS)
Input voltage range for
LS/LDO
Load Switch Mode 0.8 6.6 V
Input voltage range for
LS/LDO
LDO Mode 2.2 6.6 V
V
OUT
DC output accuracy
T
J
= 25°C –2% ±1% 2%
Over V
IN
, I
OUT
, temperature –3% ±2% 3%
V
LDO
Output range for LS/LDO Programmable Range, 0.1 V steps 0.8 3.3 V
ΔV
OUT
/ Δ V
IN
DC Line regulation V
OUT(NOM)
+ 0.5 V < V
IN
< 6.6 V, I
OUT
= 5 mA –1% 1%
DC Load regulation 0 mA < I
OUT
< 100 mA –1% 1%
Load Transient 2 µA to 100 mA, VOUT = 1. 8 V –120 60 mV
R
DS(ON_LDO)
FET Rdson V
(VINLS)
= 3.6 V 570 800 mΩ
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BQ25120F3A
SLUSDI4A – OCTOBER 2018 – REVISED APRIL 2021
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