TCP201 User Manual Issue 1.4
Page 11 of 35
3.1.2.1 I/O Base Address Implementation
1. Write a value of ‘1’ to all bits of the PCI Base Address Registers 0 to 5.
2. Check that bit 0 of the register contains a value of ‘1’ (PCI9030 needs an I/O address space).
3. Starting at bit location 2 of the PCI Base Address Register, search for the first bit set to a value of
‘1’. This bit is the binary size of the total contiguous block of I/O address space needed by the
PCI9030.
For example, if bit 5 of the PCI Base Address Register is detected as the first bit set to ‘1’, the
PCI9030 is requesting a 32 byte block of I/O address space.
4. Write the start address of the requested I/O address space to the PCI Base Address Register.
The PCI Base Address 1 for I/O Mapped Configuration Registers (128 byte) is used by the
TCP201 as I/O address space.
3.1.2.2 Memory Base Address Implementation
1. Write a value of ‘1’ to all bits of the PCI Base Address Registers 0 to 5.
2. Check that bit 0 of the register contains a value of ‘0’ (PCI9030 needs a memory address space).
3. Starting at bit location 4 of the PCI Base Address Register, search for the first bit set to a value of
‘1’. This bit is the binary size of the total contiguous block of memory address space needed by the
PCI9030.
For example, if bit 15 of the PCI Base Address Register is detected as the first bit set to ‘1’, the
PCI9030 is requesting a 32 kilobyte block of memory address space.
4. Write the start address of the requested memory address block to the PCI Base Address Register.
This memory address region must not conflict with any other memory space utilized within the
system. In addition, it must comply with the definition contained in bits 1 and 2 of this register.
The PCI Base Address 0 for Memory Mapped Configuration Registers (128 byte) and the PCI
Base Addresses 2 to 5 for Local Address Space 0 to 3 are used by the TCP201 as memory
address space.
