Terasic HAN Pilot Platform, Руководство по демонстрации

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HAN Pilot Platform
Demonstration Manual 22 www.terasic.com
September 6, 2019
2.7 HDMI TX and RX in 4K Resolution
This demonstration uses the Intel® FPGA HDMI IP core to implement the HDMI Retransmit
function in the FPGA of the HAN Pilot Platform. As shown in
Figure 2-20 , user can connect an
HDMI video player to the input video and audio data to HDMI RX port of the HAN Pilot Platform.
After the HDMI video data is received in the FPGA, it will be instantly transferred to the HDMI TX
port. The user only needs to connect an HDMI screen to the HAN Pilot Platform. User only needs
to connect an HDMI screen to the HAN Pilot Platform, then you can watch the images output by
the HDMI Player. This demonstration supports image resolution up to 4K60P. If you want to learn
HDMI high-performance related image processing, this demo can help you learn quickly.
Figure 2-20 The Architecture of the demonstration

System Block Diagram
Figure 2-21 shows the system block diagram of this example. It shows that the Intel® FPGA HDMI
IP core is used in the FPGA. It is divided into two parts: Transmitter and Receiver. These two IPs
can be directly used by Transition-minimized differential signaling (TMDS) interface connection,
only need HDMI repeater or redrive IC as an intermediary to connect HDMI devices, no need to use
special HDMI Transmitter and Receiver IC. For details about HDMI IP, please refer to
HDMI
Intel® FPGA IP User Guide and Intel FPGA HDMI Design Example User Guide for Intel Arria 10
Devices .